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/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/core/
Dintr.c22 #include <core/intr.h>
29 nvkm_intr_xlat(struct nvkm_subdev *subdev, struct nvkm_intr *intr, in nvkm_intr_xlat() argument
36 const struct nvkm_intr_data *data = intr->data; in nvkm_intr_xlat()
42 if (tdev->intr >= 0 && in nvkm_intr_xlat()
45 if (data->mask & BIT(tdev->intr)) { in nvkm_intr_xlat()
47 *mask = BIT(tdev->intr); in nvkm_intr_xlat()
65 if (type < intr->leaves * sizeof(*intr->stat) * 8) { in nvkm_intr_xlat()
78 struct nvkm_intr *intr; in nvkm_intr_find() local
81 list_for_each_entry(intr, &subdev->device->intr.intr, head) { in nvkm_intr_find()
82 ret = nvkm_intr_xlat(subdev, intr, type, leaf, mask); in nvkm_intr_find()
[all …]
/linux-6.12.1/drivers/irqchip/
Dirq-ti-sci-intr.c24 * @out_irqs: TISCI resource pointer representing INTR irqs.
38 .name = "INTR",
62 struct ti_sci_intr_irq_domain *intr = domain->host_data; in ti_sci_intr_irq_domain_translate() local
68 *type = intr->type; in ti_sci_intr_irq_domain_translate()
75 * @intr: IRQ domain corresponding to Interrupt Router
80 static int ti_sci_intr_xlate_irq(struct ti_sci_intr_irq_domain *intr, u32 irq) in ti_sci_intr_xlate_irq() argument
82 struct device_node *np = dev_of_node(intr->dev); in ti_sci_intr_xlate_irq()
111 struct ti_sci_intr_irq_domain *intr = domain->host_data; in ti_sci_intr_irq_domain_free() local
118 intr->sci->ops.rm_irq_ops.free_irq(intr->sci, in ti_sci_intr_irq_domain_free()
119 intr->ti_sci_id, data->hwirq, in ti_sci_intr_irq_domain_free()
[all …]
Dirq-mips-gic.c69 static void gic_clear_pcpu_masks(unsigned int intr) in gic_clear_pcpu_masks() argument
75 clear_bit(intr, per_cpu_ptr(pcpu_masks, i)); in gic_clear_pcpu_masks()
78 static bool gic_local_irq_is_routable(int intr) in gic_local_irq_is_routable() argument
87 switch (intr) { in gic_local_irq_is_routable()
153 unsigned int intr; in gic_handle_shared_int() local
169 for_each_set_bit(intr, pending, gic_shared_intrs) { in gic_handle_shared_int()
172 GIC_SHARED_TO_HWIRQ(intr)); in gic_handle_shared_int()
175 GIC_SHARED_TO_HWIRQ(intr)); in gic_handle_shared_int()
181 unsigned int intr = GIC_HWIRQ_TO_SHARED(d->hwirq); in gic_mask_irq() local
183 write_gic_rmask(intr); in gic_mask_irq()
[all …]
/linux-6.12.1/drivers/net/ethernet/cisco/enic/
Dvnic_intr.c17 void vnic_intr_free(struct vnic_intr *intr) in vnic_intr_free() argument
19 intr->ctrl = NULL; in vnic_intr_free()
22 int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr, in vnic_intr_alloc() argument
25 intr->index = index; in vnic_intr_alloc()
26 intr->vdev = vdev; in vnic_intr_alloc()
28 intr->ctrl = vnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index); in vnic_intr_alloc()
29 if (!intr->ctrl) { in vnic_intr_alloc()
30 vdev_err(vdev, "Failed to hook INTR[%d].ctrl resource\n", in vnic_intr_alloc()
38 void vnic_intr_init(struct vnic_intr *intr, u32 coalescing_timer, in vnic_intr_init() argument
41 vnic_intr_coalescing_timer_set(intr, coalescing_timer); in vnic_intr_init()
[all …]
Dvnic_intr.h41 static inline void vnic_intr_unmask(struct vnic_intr *intr) in vnic_intr_unmask() argument
43 iowrite32(0, &intr->ctrl->mask); in vnic_intr_unmask()
46 static inline void vnic_intr_mask(struct vnic_intr *intr) in vnic_intr_mask() argument
48 iowrite32(1, &intr->ctrl->mask); in vnic_intr_mask()
51 static inline int vnic_intr_masked(struct vnic_intr *intr) in vnic_intr_masked() argument
53 return ioread32(&intr->ctrl->mask); in vnic_intr_masked()
56 static inline void vnic_intr_return_credits(struct vnic_intr *intr, in vnic_intr_return_credits() argument
66 iowrite32(int_credit_return, &intr->ctrl->int_credit_return); in vnic_intr_return_credits()
69 static inline unsigned int vnic_intr_credits(struct vnic_intr *intr) in vnic_intr_credits() argument
71 return ioread32(&intr->ctrl->int_credits); in vnic_intr_credits()
[all …]
/linux-6.12.1/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_interrupts.c209 static inline struct dpu_hw_intr_entry *dpu_core_irq_get_entry(struct dpu_hw_intr *intr, in dpu_core_irq_get_entry() argument
212 return &intr->irq_tbl[irq_idx - 1]; in dpu_core_irq_get_entry()
243 struct dpu_hw_intr *intr = dpu_kms->hw_intr; in dpu_core_irq() local
251 if (!intr) in dpu_core_irq()
254 spin_lock_irqsave(&intr->irq_lock, irq_flags); in dpu_core_irq()
256 if (!test_bit(reg_idx, &intr->irq_mask)) in dpu_core_irq()
260 irq_status = DPU_REG_READ(&intr->hw, intr->intr_set[reg_idx].status_off); in dpu_core_irq()
263 enable_mask = DPU_REG_READ(&intr->hw, intr->intr_set[reg_idx].en_off); in dpu_core_irq()
267 DPU_REG_WRITE(&intr->hw, intr->intr_set[reg_idx].clr_off, in dpu_core_irq()
277 * Search through matching intr status. in dpu_core_irq()
[all …]
/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/vfn/
Dtu102.c29 tu102_vfn_intr_reset(struct nvkm_intr *intr, int leaf, u32 mask) in tu102_vfn_intr_reset() argument
31 struct nvkm_vfn *vfn = container_of(intr, typeof(*vfn), intr); in tu102_vfn_intr_reset()
37 tu102_vfn_intr_allow(struct nvkm_intr *intr, int leaf, u32 mask) in tu102_vfn_intr_allow() argument
39 struct nvkm_vfn *vfn = container_of(intr, typeof(*vfn), intr); in tu102_vfn_intr_allow()
45 tu102_vfn_intr_block(struct nvkm_intr *intr, int leaf, u32 mask) in tu102_vfn_intr_block() argument
47 struct nvkm_vfn *vfn = container_of(intr, typeof(*vfn), intr); in tu102_vfn_intr_block()
53 tu102_vfn_intr_rearm(struct nvkm_intr *intr) in tu102_vfn_intr_rearm() argument
55 struct nvkm_vfn *vfn = container_of(intr, typeof(*vfn), intr); in tu102_vfn_intr_rearm()
61 tu102_vfn_intr_unarm(struct nvkm_intr *intr) in tu102_vfn_intr_unarm() argument
63 struct nvkm_vfn *vfn = container_of(intr, typeof(*vfn), intr); in tu102_vfn_intr_unarm()
[all …]
/linux-6.12.1/drivers/scsi/fnic/
Dvnic_intr.c15 void vnic_intr_free(struct vnic_intr *intr) in vnic_intr_free() argument
17 intr->ctrl = NULL; in vnic_intr_free()
20 int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr, in vnic_intr_alloc() argument
23 intr->index = index; in vnic_intr_alloc()
24 intr->vdev = vdev; in vnic_intr_alloc()
26 intr->ctrl = vnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index); in vnic_intr_alloc()
27 if (!intr->ctrl) { in vnic_intr_alloc()
28 printk(KERN_ERR "Failed to hook INTR[%d].ctrl resource\n", in vnic_intr_alloc()
36 void vnic_intr_init(struct vnic_intr *intr, unsigned int coalescing_timer, in vnic_intr_init() argument
39 iowrite32(coalescing_timer, &intr->ctrl->coalescing_timer); in vnic_intr_init()
[all …]
Dvnic_intr.h56 static inline void vnic_intr_unmask(struct vnic_intr *intr) in vnic_intr_unmask() argument
58 iowrite32(0, &intr->ctrl->mask); in vnic_intr_unmask()
61 static inline void vnic_intr_mask(struct vnic_intr *intr) in vnic_intr_mask() argument
63 iowrite32(1, &intr->ctrl->mask); in vnic_intr_mask()
66 static inline void vnic_intr_return_credits(struct vnic_intr *intr, in vnic_intr_return_credits() argument
76 iowrite32(int_credit_return, &intr->ctrl->int_credit_return); in vnic_intr_return_credits()
79 static inline unsigned int vnic_intr_credits(struct vnic_intr *intr) in vnic_intr_credits() argument
81 return ioread32(&intr->ctrl->int_credits); in vnic_intr_credits()
84 static inline void vnic_intr_return_all_credits(struct vnic_intr *intr) in vnic_intr_return_all_credits() argument
86 unsigned int credits = vnic_intr_credits(intr); in vnic_intr_return_all_credits()
[all …]
Dfnic_isr.c32 vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_NOTIFY]); in fnic_isr_legacy()
37 vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_ERR]); in fnic_isr_legacy()
43 vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_DUMMY]); in fnic_isr_legacy()
51 vnic_intr_return_credits(&fnic->intr[FNIC_INTX_WQ_RQ_COPYWQ], in fnic_isr_legacy()
53 1 /* unmask intr */, in fnic_isr_legacy()
54 1 /* reset intr timer */); in fnic_isr_legacy()
72 vnic_intr_return_credits(&fnic->intr[0], in fnic_isr_msi()
74 1 /* unmask intr */, in fnic_isr_msi()
75 1 /* reset intr timer */); in fnic_isr_msi()
89 vnic_intr_return_credits(&fnic->intr[FNIC_MSIX_RQ], in fnic_isr_msix_rq()
[all …]
/linux-6.12.1/drivers/scsi/snic/
Dvnic_intr.c12 void svnic_intr_free(struct vnic_intr *intr) in svnic_intr_free() argument
14 intr->ctrl = NULL; in svnic_intr_free()
17 int svnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr, in svnic_intr_alloc() argument
20 intr->index = index; in svnic_intr_alloc()
21 intr->vdev = vdev; in svnic_intr_alloc()
23 intr->ctrl = svnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index); in svnic_intr_alloc()
24 if (!intr->ctrl) { in svnic_intr_alloc()
25 pr_err("Failed to hook INTR[%d].ctrl resource\n", in svnic_intr_alloc()
33 void svnic_intr_init(struct vnic_intr *intr, unsigned int coalescing_timer, in svnic_intr_init() argument
36 iowrite32(coalescing_timer, &intr->ctrl->coalescing_timer); in svnic_intr_init()
[all …]
Dvnic_intr.h40 svnic_intr_unmask(struct vnic_intr *intr) in svnic_intr_unmask() argument
42 iowrite32(0, &intr->ctrl->mask); in svnic_intr_unmask()
46 svnic_intr_mask(struct vnic_intr *intr) in svnic_intr_mask() argument
48 iowrite32(1, &intr->ctrl->mask); in svnic_intr_mask()
52 svnic_intr_return_credits(struct vnic_intr *intr, in svnic_intr_return_credits() argument
64 iowrite32(int_credit_return, &intr->ctrl->int_credit_return); in svnic_intr_return_credits()
68 svnic_intr_credits(struct vnic_intr *intr) in svnic_intr_credits() argument
70 return ioread32(&intr->ctrl->int_credits); in svnic_intr_credits()
74 svnic_intr_return_all_credits(struct vnic_intr *intr) in svnic_intr_return_all_credits() argument
76 unsigned int credits = svnic_intr_credits(intr); in svnic_intr_return_all_credits()
[all …]
/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/mc/
Dgp100.c48 gp100_mc_intr_allow(struct nvkm_intr *intr, int leaf, u32 mask) in gp100_mc_intr_allow() argument
50 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr); in gp100_mc_intr_allow()
56 gp100_mc_intr_block(struct nvkm_intr *intr, int leaf, u32 mask) in gp100_mc_intr_block() argument
58 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr); in gp100_mc_intr_block()
64 gp100_mc_intr_rearm(struct nvkm_intr *intr) in gp100_mc_intr_rearm() argument
68 for (i = 0; i < intr->leaves; i++) in gp100_mc_intr_rearm()
69 intr->func->allow(intr, i, intr->mask[i]); in gp100_mc_intr_rearm()
73 gp100_mc_intr_unarm(struct nvkm_intr *intr) in gp100_mc_intr_unarm() argument
77 for (i = 0; i < intr->leaves; i++) in gp100_mc_intr_unarm()
78 intr->func->block(intr, i, 0xffffffff); in gp100_mc_intr_unarm()
[all …]
Dnv04.c72 nv04_mc_intr_rearm(struct nvkm_intr *intr) in nv04_mc_intr_rearm() argument
74 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr); in nv04_mc_intr_rearm()
77 for (leaf = 0; leaf < intr->leaves; leaf++) in nv04_mc_intr_rearm()
82 nv04_mc_intr_unarm(struct nvkm_intr *intr) in nv04_mc_intr_unarm() argument
84 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr); in nv04_mc_intr_unarm()
87 for (leaf = 0; leaf < intr->leaves; leaf++) in nv04_mc_intr_unarm()
94 nv04_mc_intr_pending(struct nvkm_intr *intr) in nv04_mc_intr_pending() argument
96 struct nvkm_mc *mc = container_of(intr, typeof(*mc), intr); in nv04_mc_intr_pending()
100 for (leaf = 0; leaf < intr->leaves; leaf++) { in nv04_mc_intr_pending()
101 intr->stat[leaf] = nvkm_rd32(mc->subdev.device, 0x000100 + (leaf * 4)); in nv04_mc_intr_pending()
[all …]
/linux-6.12.1/arch/mips/include/asm/
Dmips-gic.h51 static inline void __iomem *addr_gic_##name(unsigned int intr) \
53 return mips_gic_base + (off) + (intr * (stride)); \
56 static inline unsigned int read_gic_##name(unsigned int intr) \
59 return __raw_readl(addr_gic_##name(intr)); \
66 static inline void write_gic_##name(unsigned int intr, \
70 __raw_writel(val, addr_gic_##name(intr)); \
102 static inline unsigned int read_gic_##name(unsigned int intr) \
108 addr += (intr / 64) * sizeof(uint64_t); \
109 val = __raw_readq(addr) >> intr % 64; \
111 addr += (intr / 32) * sizeof(uint32_t); \
[all …]
/linux-6.12.1/drivers/net/ethernet/intel/idpf/
Didpf_vf_dev.c56 struct idpf_intr_reg *intr = &adapter->mb_vector.intr_reg; in idpf_vf_mb_intr_reg_init() local
59 intr->dyn_ctl = idpf_get_reg_addr(adapter, dyn_ctl); in idpf_vf_mb_intr_reg_init()
60 intr->dyn_ctl_intena_m = VF_INT_DYN_CTL0_INTENA_M; in idpf_vf_mb_intr_reg_init()
61 intr->dyn_ctl_itridx_m = VF_INT_DYN_CTL0_ITR_INDX_M; in idpf_vf_mb_intr_reg_init()
62 intr->icr_ena = idpf_get_reg_addr(adapter, VF_INT_ICR0_ENA1); in idpf_vf_mb_intr_reg_init()
63 intr->icr_ena_ctlq_m = VF_INT_ICR0_ENA1_ADMINQ_M; in idpf_vf_mb_intr_reg_init()
94 struct idpf_intr_reg *intr = &q_vector->intr_reg; in idpf_vf_intr_reg_init() local
97 intr->dyn_ctl = idpf_get_reg_addr(adapter, in idpf_vf_intr_reg_init()
99 intr->dyn_ctl_intena_m = VF_INT_DYN_CTLN_INTENA_M; in idpf_vf_intr_reg_init()
100 intr->dyn_ctl_intena_msk_m = VF_INT_DYN_CTLN_INTENA_MSK_M; in idpf_vf_intr_reg_init()
[all …]
Didpf_dev.c56 struct idpf_intr_reg *intr = &adapter->mb_vector.intr_reg; in idpf_mb_intr_reg_init() local
59 intr->dyn_ctl = idpf_get_reg_addr(adapter, dyn_ctl); in idpf_mb_intr_reg_init()
60 intr->dyn_ctl_intena_m = PF_GLINT_DYN_CTL_INTENA_M; in idpf_mb_intr_reg_init()
61 intr->dyn_ctl_itridx_m = PF_GLINT_DYN_CTL_ITR_INDX_M; in idpf_mb_intr_reg_init()
62 intr->icr_ena = idpf_get_reg_addr(adapter, PF_INT_DIR_OICR_ENA); in idpf_mb_intr_reg_init()
63 intr->icr_ena_ctlq_m = PF_INT_DIR_OICR_ENA_M; in idpf_mb_intr_reg_init()
94 struct idpf_intr_reg *intr = &q_vector->intr_reg; in idpf_intr_reg_init() local
97 intr->dyn_ctl = idpf_get_reg_addr(adapter, in idpf_intr_reg_init()
99 intr->dyn_ctl_intena_m = PF_GLINT_DYN_CTL_INTENA_M; in idpf_intr_reg_init()
100 intr->dyn_ctl_intena_msk_m = PF_GLINT_DYN_CTL_INTENA_MSK_M; in idpf_intr_reg_init()
[all …]
/linux-6.12.1/drivers/usb/mtu3/
Dmtu3_trace.h36 TP_PROTO(u32 intr),
37 TP_ARGS(intr),
39 __field(u32, intr)
42 __entry->intr = intr;
44 TP_printk("(%08x) %s %s %s %s %s %s", __entry->intr,
45 __entry->intr & HOT_RST_INTR ? "HOT_RST" : "",
46 __entry->intr & WARM_RST_INTR ? "WARM_RST" : "",
47 __entry->intr & ENTER_U3_INTR ? "ENT_U3" : "",
48 __entry->intr & EXIT_U3_INTR ? "EXIT_U3" : "",
49 __entry->intr & VBUS_RISE_INTR ? "VBUS_RISE" : "",
[all …]
/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/engine/ce/
Dgk104.c65 u32 intr = nvkm_rd32(device, 0x104908 + base) & mask; in gk104_ce_intr() local
66 if (intr & 0x00000001) { in gk104_ce_intr()
69 intr &= ~0x00000001; in gk104_ce_intr()
71 if (intr & 0x00000002) { in gk104_ce_intr()
74 intr &= ~0x00000002; in gk104_ce_intr()
76 if (intr & 0x00000004) { in gk104_ce_intr()
79 intr &= ~0x00000004; in gk104_ce_intr()
81 if (intr) { in gk104_ce_intr()
82 nvkm_warn(subdev, "intr %08x\n", intr); in gk104_ce_intr()
83 nvkm_wr32(device, 0x104908 + base, intr); in gk104_ce_intr()
[all …]
Dgp100.c66 u32 intr = nvkm_rd32(device, 0x104410 + base) & mask; in gp100_ce_intr() local
67 if (intr & 0x00000001) { //XXX: guess in gp100_ce_intr()
70 intr &= ~0x00000001; in gp100_ce_intr()
72 if (intr & 0x00000002) { //XXX: guess in gp100_ce_intr()
75 intr &= ~0x00000002; in gp100_ce_intr()
77 if (intr & 0x00000004) { in gp100_ce_intr()
80 intr &= ~0x00000004; in gp100_ce_intr()
82 if (intr) { in gp100_ce_intr()
83 nvkm_warn(subdev, "intr %08x\n", intr); in gp100_ce_intr()
84 nvkm_wr32(device, 0x104410 + base, intr); in gp100_ce_intr()
[all …]
/linux-6.12.1/arch/m68k/include/asm/
Dmcfintc.h31 #define MCFSIM_ICR_AUTOVEC 0x80 /* Auto-vectored intr */
32 #define MCFSIM_ICR_LEVEL0 0x00 /* Level 0 intr */
33 #define MCFSIM_ICR_LEVEL1 0x04 /* Level 1 intr */
34 #define MCFSIM_ICR_LEVEL2 0x08 /* Level 2 intr */
35 #define MCFSIM_ICR_LEVEL3 0x0c /* Level 3 intr */
36 #define MCFSIM_ICR_LEVEL4 0x10 /* Level 4 intr */
37 #define MCFSIM_ICR_LEVEL5 0x14 /* Level 5 intr */
38 #define MCFSIM_ICR_LEVEL6 0x18 /* Level 6 intr */
39 #define MCFSIM_ICR_LEVEL7 0x1c /* Level 7 intr */
41 #define MCFSIM_ICR_PRI0 0x00 /* Priority 0 intr */
[all …]
/linux-6.12.1/drivers/net/wireless/zydas/zd1211rw/
Dzd_usb.c360 struct zd_usb_interrupt *intr = &usb->intr; in handle_regs_int_override() local
363 spin_lock_irqsave(&intr->lock, flags); in handle_regs_int_override()
364 if (atomic_read(&intr->read_regs_enabled)) { in handle_regs_int_override()
365 atomic_set(&intr->read_regs_enabled, 0); in handle_regs_int_override()
366 intr->read_regs_int_overridden = 1; in handle_regs_int_override()
367 complete(&intr->read_regs.completion); in handle_regs_int_override()
369 spin_unlock_irqrestore(&intr->lock, flags); in handle_regs_int_override()
375 struct zd_usb_interrupt *intr = &usb->intr; in handle_regs_int() local
380 spin_lock_irqsave(&intr->lock, flags); in handle_regs_int()
390 } else if (atomic_read(&intr->read_regs_enabled)) { in handle_regs_int()
[all …]
/linux-6.12.1/drivers/net/wireless/mediatek/mt76/mt7603/
Dcore.c16 u32 intr; in mt7603_irq_handler() local
18 intr = mt76_rr(dev, MT_INT_SOURCE_CSR); in mt7603_irq_handler()
19 mt76_wr(dev, MT_INT_SOURCE_CSR, intr); in mt7603_irq_handler()
24 trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask); in mt7603_irq_handler()
26 intr &= dev->mt76.mmio.irqmask; in mt7603_irq_handler()
28 if (intr & MT_INT_MAC_IRQ3) { in mt7603_irq_handler()
39 if (intr & MT_INT_TX_DONE_ALL) { in mt7603_irq_handler()
44 if (intr & MT_INT_RX_DONE(0)) { in mt7603_irq_handler()
50 if (intr & MT_INT_RX_DONE(1)) { in mt7603_irq_handler()
/linux-6.12.1/drivers/scsi/
Dmac53c94.c46 int intr; member
198 int nb, stat, seq, intr; in mac53c94_interrupt() local
207 intr = readb(&regs->interrupt); in mac53c94_interrupt()
210 printk(KERN_DEBUG "mac53c94_intr, intr=%x stat=%x seq=%x phase=%d\n", in mac53c94_interrupt()
211 intr, stat, seq, state->phase); in mac53c94_interrupt()
214 if (intr & INTR_RESET) { in mac53c94_interrupt()
222 if (intr & INTR_ILL_CMD) { in mac53c94_interrupt()
223 printk(KERN_ERR "53c94: invalid cmd, intr=%x stat=%x seq=%x phase=%d\n", in mac53c94_interrupt()
224 intr, stat, seq, state->phase); in mac53c94_interrupt()
231 printk("53c94: bad error, intr=%x stat=%x seq=%x phase=%d\n", in mac53c94_interrupt()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/
Dti,sci-intr.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/ti,sci-intr.yaml#
16 The Interrupt Router (INTR) module provides a mechanism to mux M
51 const: ti,sci-intr
53 ti,intr-trigger-type:
58 1 = If intr supports edge triggered interrupts.
59 4 = If intr supports level triggered interrupts.
74 Interrupt ranges that converts the INTR output hw irq numbers
79 "output_irq" specifies the base for intr output irq
87 - ti,intr-trigger-type
99 compatible = "ti,sci-intr";
[all …]

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