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Searched +full:imx8qm +full:- +full:usb3 (Results 1 – 4 of 4) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/usb/
Dfsl,imx8qm-cdns3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/fsl,imx8qm-cdns3.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: NXP iMX8QM Soc USB Controller
11 - Frank Li <Frank.Li@nxp.com>
15 const: fsl,imx8qm-usb3
19 - description: Register set for iMX USB3 Platform Control
21 "#address-cells":
24 "#size-cells":
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/linux-6.12.1/drivers/usb/cdns3/
DKconfig8 dual-role controller.
9 It supports: dual-role switch, Host-only, and Peripheral-only.
17 tristate "Cadence USB3 Dual-Role Controller"
20 Say Y here if your system has a Cadence USB3 dual-role controller.
21 It supports: dual-role switch, Host-only, and Peripheral-only.
30 bool "Cadence USB3 device controller"
34 Cadence USBSS-DEV driver.
40 bool "Cadence USB3 host controller"
51 tristate "Cadence USB3 support on PCIe-based platforms"
59 be dynamically linked and module will be called cdns3-pci.ko
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Dcdns3-imx.c1 // SPDX-License-Identifier: GPL-2.0
3 * cdns3-imx.c - NXP i.MX specific Glue layer for Cadence USB Controller
14 #include <linux/dma-mapping.h>
99 return readl(data->noncore + offset); in cdns_imx_readl()
104 writel(value, data->noncore + offset); in cdns_imx_writel()
119 struct device *dev = data->dev; in cdns_imx_noncore_init()
123 ret = readl_poll_timeout(data->noncore + USB3_SSPHY_STATUS, value, in cdns_imx_noncore_init()
159 .compatible = "cdns,usb3",
167 struct device *dev = &pdev->dev; in cdns_imx_probe()
168 struct device_node *node = dev->of_node; in cdns_imx_probe()
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/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8-ss-conn.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
10 conn_axi_clk: clock-conn-axi {
11 compatible = "fixed-clock";
12 #clock-cells = <0>;
13 clock-frequency = <333333333>;
14 clock-output-names = "conn_axi_clk";
17 conn_ahb_clk: clock-conn-ahb {
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