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Searched +full:imx8mp +full:- +full:hdmi +full:- +full:pvi (Results 1 – 6 of 6) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/display/imx/
Dfsl,imx8mp-hdmi-pvi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/imx/fsl,imx8mp-hdmi-pvi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX8MP HDMI Parallel Video Interface
10 - Lucas Stach <l.stach@pengutronix.de>
13 The HDMI parallel video interface is a timing and sync generator block in the
14 i.MX8MP SoC, that sits between the video source and the HDMI TX controller.
18 const: fsl,imx8mp-hdmi-pvi
26 power-domains:
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/linux-6.12.1/Documentation/devicetree/bindings/soc/imx/
Dfsl,imx8mp-hdmi-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MP HDMI blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to
15 peripherals located in the HDMI domain of the SoC.
20 - const: fsl,imx8mp-hdmi-blk-ctrl
21 - const: syscon
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/linux-6.12.1/drivers/gpu/drm/bridge/imx/
Dimx8mp-hdmi-pvi.c1 // SPDX-License-Identifier: GPL-2.0+
45 struct imx8mp_hdmi_pvi *pvi = to_imx8mp_hdmi_pvi(bridge); in imx8mp_hdmi_pvi_bridge_attach() local
47 return drm_bridge_attach(bridge->encoder, pvi->next_bridge, in imx8mp_hdmi_pvi_bridge_attach()
54 struct drm_atomic_state *state = bridge_state->base.state; in imx8mp_hdmi_pvi_bridge_enable()
55 struct imx8mp_hdmi_pvi *pvi = to_imx8mp_hdmi_pvi(bridge); in imx8mp_hdmi_pvi_bridge_enable() local
62 connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); in imx8mp_hdmi_pvi_bridge_enable()
64 crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc); in imx8mp_hdmi_pvi_bridge_enable()
66 if (WARN_ON(pm_runtime_resume_and_get(pvi->dev))) in imx8mp_hdmi_pvi_bridge_enable()
69 mode = &crtc_state->adjusted_mode; in imx8mp_hdmi_pvi_bridge_enable()
73 if (mode->flags & DRM_MODE_FLAG_PVSYNC) in imx8mp_hdmi_pvi_bridge_enable()
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DMakefile1 obj-$(CONFIG_DRM_IMX_LDB_HELPER) += imx-ldb-helper.o
2 obj-$(CONFIG_DRM_IMX8MP_DW_HDMI_BRIDGE) += imx8mp-hdmi-tx.o
3 obj-$(CONFIG_DRM_IMX8MP_HDMI_PVI) += imx8mp-hdmi-pvi.o
4 obj-$(CONFIG_DRM_IMX8QM_LDB) += imx8qm-ldb.o
5 obj-$(CONFIG_DRM_IMX8QXP_LDB) += imx8qxp-ldb.o
6 obj-$(CONFIG_DRM_IMX8QXP_PIXEL_COMBINER) += imx8qxp-pixel-combiner.o
7 obj-$(CONFIG_DRM_IMX8QXP_PIXEL_LINK) += imx8qxp-pixel-link.o
8 obj-$(CONFIG_DRM_IMX8QXP_PIXEL_LINK_TO_DPI) += imx8qxp-pxl2dpi.o
9 obj-$(CONFIG_DRM_IMX93_MIPI_DSI) += imx93-mipi-dsi.o
/linux-6.12.1/drivers/pmdomain/imx/
Dimx8mp-blk-ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <linux/clk-provider.h>
19 #include <dt-bindings/power/imx8mp-power.h>
104 regmap_update_bits(clk->regmap, GPR_REG2, in clk_hsio_pll_prepare()
110 /* de-assert PLL reset */ in clk_hsio_pll_prepare()
111 regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST, PLL_RST); in clk_hsio_pll_prepare()
114 regmap_update_bits(clk->regmap, GPR_REG3, PLL_CKE, PLL_CKE); in clk_hsio_pll_prepare()
116 return regmap_read_poll_timeout(clk->regmap, GPR_REG1, val, in clk_hsio_pll_prepare()
124 regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST | PLL_CKE, 0); in clk_hsio_pll_unprepare()
131 return regmap_test_bits(clk->regmap, GPR_REG1, PLL_LOCK); in clk_hsio_pll_is_prepared()
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/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
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