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/linux-6.12.1/Documentation/devicetree/bindings/nvmem/
Dimx-ocotp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX On-Chip OTP Controller (OCOTP)
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
12 - Fabio Estevam <festevam@gmail.com>
15 This binding represents the on-chip eFuse OTP controller found on
20 - $ref: nvmem.yaml#
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/linux-6.12.1/Documentation/devicetree/bindings/thermal/
Dimx-thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/imx-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
15 - enum:
16 - fsl,imx6q-tempmon
17 - fsl,imx6sx-tempmon
18 - fsl,imx7d-tempmon
19 - items:
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/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx6ull.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include "imx6ull-pinfunc.h"
7 #include "imx6ull-pinfunc-snvs.h"
9 /* Delete UART8 in AIPS-1 (i.MX6UL specific) */
10 /delete-node/ &uart8;
11 /* Delete CAAM node in AIPS-2 (i.MX6UL specific) */
12 /delete-node/ &crypto;
15 clock-frequency = <900000000>;
16 operating-points = <
24 fsl,soc-operating-points = <
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Dimx6sx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6sx-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6sx-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
60 #address-cells = <1>;
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Dimx7ulp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
8 #include <dt-bindings/clock/imx7ulp-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include "imx7ulp-pinfunc.h"
15 interrupt-parent = <&intc>;
17 #address-cells = <1>;
18 #size-cells = <1>;
37 #address-cells = <1>;
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Dimx6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include "imx6ul-pinfunc.h"
12 #address-cells = <1>;
13 #size-cells = <1>;
16 * pre-existing /chosen node to be available to insert the
57 #address-cells = <1>;
[all …]
Dimx6sll.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright 2017-2018 NXP.
8 #include <dt-bindings/clock/imx6sll-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "imx6sll-pinfunc.h"
14 #address-cells = <1>;
15 #size-cells = <1>;
46 #address-cells = <1>;
47 #size-cells = <0>;
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Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
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/linux-6.12.1/drivers/soc/imx/
Dsoc-imx.c1 // SPDX-License-Identifier: GPL-2.0
32 struct regmap *ocotp = NULL; in imx_soc_device_init() local
45 return -ENOMEM; in imx_soc_device_init()
47 soc_dev_attr->family = "Freescale i.MX"; in imx_soc_device_init()
50 ret = of_property_read_string(root, "model", &soc_dev_attr->machine); in imx_soc_device_init()
78 ocotp_compat = "fsl,imx51-iim"; in imx_soc_device_init()
82 ocotp_compat = "fsl,imx53-iim"; in imx_soc_device_init()
86 ocotp_compat = "fsl,imx6sl-ocotp"; in imx_soc_device_init()
90 ocotp_compat = "fsl,imx6q-ocotp"; in imx_soc_device_init()
94 ocotp_compat = "fsl,imx6sx-ocotp"; in imx_soc_device_init()
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/linux-6.12.1/drivers/nvmem/
Dimx-ocotp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * i.MX6 OCOTP fusebox driver
9 * Based on the barebox ocotp driver,
14 * Copyright (C) 2010-2013 Freescale Semiconductor, Inc
21 #include <linux/nvmem-provider.h>
106 void __iomem *base = priv->base; in imx_ocotp_wait_for_busy()
108 bm_ctrl_busy = priv->params->ctrl.bm_busy; in imx_ocotp_wait_for_busy()
109 bm_ctrl_error = priv->params->ctrl.bm_error; in imx_ocotp_wait_for_busy()
113 for (count = 10000; count >= 0; count--) { in imx_ocotp_wait_for_busy()
123 * - A write is performed to a shadow register during a shadow in imx_ocotp_wait_for_busy()
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/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
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Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/imx8mm-power.h>
11 #include <dt-bindings/reset/imx8mq-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mm-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
Dimx8mq.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 #include <dt-bindings/clock/imx8mq-clock.h>
8 #include <dt-bindings/power/imx8mq-power.h>
9 #include <dt-bindings/reset/imx8mq-reset.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include "dt-bindings/input/input.h"
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interconnect/imx8mq.h>
[all …]
Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
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Dimx93.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/dma/fsl-edma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/fsl,imx93-power.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx93-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
/linux-6.12.1/drivers/clk/imx/
Dclk-imx6sx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/clock/imx6sx-clock.h>
10 #include <linux/clk-provider.h>
131 clk_hw_data->num = IMX6SX_CLK_CLK_END; in imx6sx_clocks_init()
132 hws = clk_hw_data->hws; in imx6sx_clocks_init()
147 np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop"); in imx6sx_clocks_init()
178 clk_set_parent(hws[IMX6SX_PLL1_BYPASS]->clk, hws[IMX6SX_CLK_PLL1]->clk); in imx6sx_clocks_init()
179 clk_set_parent(hws[IMX6SX_PLL2_BYPASS]->clk, hws[IMX6SX_CLK_PLL2]->clk); in imx6sx_clocks_init()
180 clk_set_parent(hws[IMX6SX_PLL3_BYPASS]->clk, hws[IMX6SX_CLK_PLL3]->clk); in imx6sx_clocks_init()
181 clk_set_parent(hws[IMX6SX_PLL4_BYPASS]->clk, hws[IMX6SX_CLK_PLL4]->clk); in imx6sx_clocks_init()
[all …]
/linux-6.12.1/drivers/thermal/
Dimx_thermal.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/nvmem-consumer.h>
222 const struct thermal_soc_data *soc_data = data->socdata; in imx_set_panic_temp()
223 struct regmap *map = data->tempmon; in imx_set_panic_temp()
226 critical_value = (data->c2 - panic_temp) / data->c1; in imx_set_panic_temp()
228 regmap_write(map, soc_data->panic_alarm_ctrl + REG_CLR, in imx_set_panic_temp()
229 soc_data->panic_alarm_mask); in imx_set_panic_temp()
230 regmap_write(map, soc_data->panic_alarm_ctrl + REG_SET, in imx_set_panic_temp()
231 critical_value << soc_data->panic_alarm_shift); in imx_set_panic_temp()
237 struct regmap *map = data->tempmon; in imx_set_alarm_temp()
[all …]