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/linux-6.12.1/drivers/mailbox/
Dtegra-hsp.c17 #include <dt-bindings/mailbox/tegra186-hsp.h>
64 struct tegra_hsp *hsp; member
126 static inline u32 tegra_hsp_readl(struct tegra_hsp *hsp, unsigned int offset) in tegra_hsp_readl() argument
128 return readl(hsp->regs + offset); in tegra_hsp_readl()
131 static inline void tegra_hsp_writel(struct tegra_hsp *hsp, u32 value, in tegra_hsp_writel() argument
134 writel(value, hsp->regs + offset); in tegra_hsp_writel()
159 __tegra_hsp_doorbell_get(struct tegra_hsp *hsp, unsigned int master) in __tegra_hsp_doorbell_get() argument
163 list_for_each_entry(entry, &hsp->doorbells, list) in __tegra_hsp_doorbell_get()
171 tegra_hsp_doorbell_get(struct tegra_hsp *hsp, unsigned int master) in tegra_hsp_doorbell_get() argument
176 spin_lock_irqsave(&hsp->lock, flags); in tegra_hsp_doorbell_get()
[all …]
DKconfig189 bool "Tegra HSP (Hardware Synchronization Primitives) Driver"
192 The Tegra HSP driver is used for the interprocessor communication
DMakefile50 obj-$(CONFIG_TEGRA_HSP_MBOX) += tegra-hsp.o
/linux-6.12.1/Documentation/devicetree/bindings/mailbox/
Dnvidia,tegra186-hsp.yaml4 $id: http://devicetree.org/schemas/mailbox/nvidia,tegra186-hsp.yaml#
7 title: NVIDIA Tegra Hardware Synchronization Primitives (HSP)
14 The HSP modules are used for the processors to share resources and
21 The features that HSP supported are shared mailboxes, shared
25 contain two cells. The first cell determines the HSP type and the
53 mailboxes may vary by instance of the HSP block and SoC
59 <dt-bindings/mailbox/tegra186-hsp.h>
63 pattern: "^hsp@[0-9a-f]+$"
67 - const: nvidia,tegra186-hsp
68 - const: nvidia,tegra194-hsp
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/firmware/
Dnvidia,tegra186-bpmp.yaml26 - .../mailbox/nvidia,tegra186-hsp.yaml
142 #include <dt-bindings/mailbox/tegra186-hsp.h>
145 hsp_top0: hsp@3c00000 {
146 compatible = "nvidia,tegra186-hsp";
201 #include <dt-bindings/mailbox/tegra186-hsp.h>
/linux-6.12.1/drivers/video/fbdev/kyro/
DSTG4000VTG.c159 if ((pTiming->HSP > 0) && (pTiming->VSP < 0)) { /* +hsync -vsync */ in SetupVTG()
161 } else if ((pTiming->HSP < 0) && (pTiming->VSP > 0)) { /* -hsync +vsync */ in SetupVTG()
163 } else if ((pTiming->HSP < 0) && (pTiming->VSP < 0)) { /* -hsync -vsync */ in SetupVTG()
165 } else if ((pTiming->HSP > 0) && (pTiming->VSP > 0)) { /* +hsync -vsync */ in SetupVTG()
Dfbdev.c315 par->HSP, par->VSP, &par->PIXCLK) < 0) in kyro_dev_video_mode_set()
470 if (par->HSP == 1) in kyrofb_check_var()
525 par->HSP = (info->var.sync & FB_SYNC_HOR_HIGH_ACT) ? 1 : 0; in kyrofb_set_par()
/linux-6.12.1/drivers/clk/imx/
Dclk-imx31.c39 dummy, ckih, ckil, mpll, spll, upll, mcu_main, hsp, ahb, nfc, ipg, enumerator
62 clk[hsp] = imx_clk_divider("hsp", "mcu_main", base + MXC_CCM_PDR0, 11, 3); in _mx31_clocks_init()
102 clk[ipu_gate] = imx_clk_gate2("ipu_gate", "hsp", base + MXC_CCM_CGR1, 22); in _mx31_clocks_init()
Dclk-imx35.c64 /* 0 */ ckih, mpll, ppll, mpll_075, arm, hsp, hsp_div, hsp_sel, ahb, enumerator
125 pr_err("i.MX35 clk: illegal hsp clk selection 0x%x\n", hsp_sel); in _mx35_clocks_init()
129 clk[hsp] = imx_clk_fixed_factor("hsp", "arm", 1, hsp_div[hsp_sel]); in _mx35_clocks_init()
190 clk[ipu_gate] = imx_clk_gate2("ipu_gate", "hsp", base + MX35_CCM_CGR1, 18); in _mx35_clocks_init()
/linux-6.12.1/drivers/video/fbdev/
Dcarminefb.c63 u32 hsp; member
106 .hsp = 672,
118 .hsp = 864,
372 u32 hdp, vdp, htp, hsp, hsw, vtr, vsp, vsw; in set_display_parameters() local
381 hsp = par->res->hsp - 1; in set_display_parameters()
394 (hsp)); in set_display_parameters()
Dpxa3xx-regs.h133 #define LCCR3_HorSnchH (LCCR3_HSP*0) /* HSP Active High */
134 #define LCCR3_HorSnchL (LCCR3_HSP*1) /* HSP Active Low */
/linux-6.12.1/drivers/firmware/tegra/
DKconfig21 It needs HSP as the HW synchronization and notification module and
Dbpmp-tegra186.c350 dev_err(bpmp->dev, "failed to get HSP mailbox: %d\n", err); in tegra186_bpmp_init()
/linux-6.12.1/include/dt-bindings/mailbox/
Dtegra186-hsp.h3 * This header provides constants for binding nvidia,tegra186-hsp.
/linux-6.12.1/Documentation/devicetree/bindings/serial/
Dnvidia,tegra194-tcu.yaml54 #include <dt-bindings/mailbox/tegra186-hsp.h>
/linux-6.12.1/drivers/scsi/lpfc/
Dlpfc_nportdisc.c88 volatile struct serv_parm *hsp = &vport->fc_sparam; in lpfc_check_sparm() local
100 hsp_value = ((hsp->cls1.rcvDataSizeMsb << 8) | in lpfc_check_sparm()
101 hsp->cls1.rcvDataSizeLsb); in lpfc_check_sparm()
108 hsp->cls1.rcvDataSizeLsb; in lpfc_check_sparm()
110 hsp->cls1.rcvDataSizeMsb; in lpfc_check_sparm()
117 hsp_value = ((hsp->cls2.rcvDataSizeMsb << 8) | in lpfc_check_sparm()
118 hsp->cls2.rcvDataSizeLsb); in lpfc_check_sparm()
125 hsp->cls2.rcvDataSizeLsb; in lpfc_check_sparm()
127 hsp->cls2.rcvDataSizeMsb; in lpfc_check_sparm()
134 hsp_value = ((hsp->cls3.rcvDataSizeMsb << 8) | in lpfc_check_sparm()
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hpo/dcn31/
Ddcn31_hpo_dp_stream_encoder.c203 uint8_t hsp; in dcn31_hpo_dp_stream_enc_set_stream_attribute() local
361 hsp = hw_crtc_timing.flags.HSYNC_POSITIVE_POLARITY ? 0 : 0x80; in dcn31_hpo_dp_stream_enc_set_stream_attribute()
375 * MSA[7] = { HSP|HSW[14:8], VSP|VSW[14:8], 0, MISC1[ 7: 0]} in dcn31_hpo_dp_stream_enc_set_stream_attribute()
421 MSA_DATA_LANE_0, hsp | (hw_crtc_timing.h_sync_width >> 8), in dcn31_hpo_dp_stream_enc_set_stream_attribute()
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dimx35-clock.yaml24 hsp 5
Dimx31-clock.yaml26 hsp 7
/linux-6.12.1/include/video/
Dkyro.h23 s32 HSP; /* Hor Sync Polarity */ member
/linux-6.12.1/drivers/video/fbdev/mb862xx/
Dmb862xxfbdrv.c48 static inline int hsp(struct fb_var_screeninfo *var) in hsp() function
251 pack((fbi->var.hsync_len - 1), hsp(&fbi->var)); in mb862xxfb_set_par()
438 unsigned long hsp, vsp, ht, vt; in mb862xxfb_init_fbinfo() local
461 hsp = (reg & 0xffff) + 1; in mb862xxfb_init_fbinfo()
463 fbi->var.right_margin = hsp - fbi->var.xres; in mb862xxfb_init_fbinfo()
464 fbi->var.left_margin = ht - hsp - fbi->var.hsync_len; in mb862xxfb_init_fbinfo()
/linux-6.12.1/Documentation/ABI/testing/
Dsysfs-driver-ccp73 whether the HSP TPM has been activated.
/linux-6.12.1/arch/arm64/boot/dts/nvidia/
Dtegra186-p3310.dtsi161 hsp@3c00000 {
Dtegra194.dtsi5 #include <dt-bindings/mailbox/tegra186-hsp.h>
1360 hsp_top0: hsp@3c00000 {
1361 compatible = "nvidia,tegra194-hsp";
1558 hsp_aon: hsp@c150000 {
1559 compatible = "nvidia,tegra194-hsp";
/linux-6.12.1/drivers/atm/
Dhe.c1463 he_dev->hsp = dma_alloc_coherent(&he_dev->pci_dev->dev, in he_start()
1466 if (he_dev->hsp == NULL) { in he_start()
1565 if (he_dev->hsp) in he_stop()
1567 he_dev->hsp, he_dev->hsp_phys); in he_stop()
1643 he_dev->hsp->group[group].rbrq_tail); in he_service_rbrq()
1803 he_dev->hsp->group[group].tbrq_tail); in he_service_tbrq()

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