| /linux-6.12.1/Documentation/driver-api/cxl/ |
| D | memory-devices.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 Address space is handled via HDM (Host Managed Device Memory) decoders
14 range across multiple devices underneath a host-bridge or interleaved
15 across host-bridges.
25 multiple Host Bridges and endpoints while another may opt for fault tolerance
28 Platform firmware enumerates a menu of interleave options at the "CXL root port"
30 dictates which endpoints can participate in which Host Bridge decode regimes.
33 given range only decodes to 1 one Host Bridge, but that Host Bridge may in turn
35 port and an endpoint may interleave cycles across multiple Downstream Switch
39 module generates an emulated CXL topology of 2 Host Bridges each with 2 Root
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| /linux-6.12.1/drivers/thunderbolt/ |
| D | test.c | 1 // SPDX-License-Identifier: GPL-2.0
20 res->data = ida; in __ida_init()
26 struct ida *ida = res->data; in __ida_destroy()
47 sw->config.upstream_port_number = upstream_port; in alloc_switch()
48 sw->config.depth = tb_route_length(route); in alloc_switch()
49 sw->config.route_hi = upper_32_bits(route); in alloc_switch()
50 sw->config.route_lo = lower_32_bits(route); in alloc_switch()
51 sw->config.enabled = 0; in alloc_switch()
52 sw->config.max_port_number = max_port_number; in alloc_switch()
54 size = (sw->config.max_port_number + 1) * sizeof(*sw->ports); in alloc_switch()
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| /linux-6.12.1/drivers/spi/ |
| D | spi-dln2.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for the Diolan DLN-2 USB-SPI adapter
82 struct spi_controller *host; member
83 u8 port; member
106 u8 port; in dln2_spi_enable() member
111 tx.port = dln2->port; in dln2_spi_enable()
115 len -= sizeof(tx.wait_for_completion); in dln2_spi_enable()
121 return dln2_transfer_tx(dln2->pdev, cmd, &tx, len); in dln2_spi_enable()
129 * Ex: cs_mask = 0x03 -> CS0 & CS1 will be selected and the next WR/RD operation
135 u8 port; in dln2_spi_cs_set() member
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| /linux-6.12.1/drivers/ata/ |
| D | pata_atp867x.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * pata_atp867x.c - ARTOP 867X 64bit 4-channel UDMA133 ATA controller driver
5 * (C) 2009 Google Inc. John(Jung-Ik) Lee <jilee@google.com>
9 * 2003-2004 by Eric Uhrhane, Google, Inc.
69 #define ATP867X_IOBASE(ap) ((ap)->host->iomap[0])
72 #define ATP867X_IO_PORTBASE(ap, port) (0x00 + ATP867X_IOBASE(ap) + \ argument
73 (port) * ATP867X_IO_CHANNEL_OFFSET)
74 #define ATP867X_IO_DMABASE(ap, port) (0x40 + \ argument
75 ATP867X_IO_PORTBASE((ap), (port)))
77 #define ATP867X_IO_STATUS(ap, port) (0x07 + \ argument
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| D | libahci_platform.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2004-2005 Red Hat, Inc.
28 static void ahci_host_stop(struct ata_host *host);
37 * ahci_platform_enable_phys - Enable PHYs
38 * @hpriv: host private area to store config values
40 * This function enables all the PHYs found in hpriv->phys, if any.
51 for (i = 0; i < hpriv->nports; i++) { in ahci_platform_enable_phys()
52 rc = phy_init(hpriv->phys[i]); in ahci_platform_enable_phys()
56 rc = phy_set_mode(hpriv->phys[i], PHY_MODE_SATA); in ahci_platform_enable_phys()
58 phy_exit(hpriv->phys[i]); in ahci_platform_enable_phys()
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| D | sata_mv.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * sata_mv.c - Marvell SATA support
5 * Copyright 2008-2009: Marvell Corporation, all rights reserved.
12 * Please ALWAYS copy linux-ide@vger.kernel.org on emails.
18 * --> Develop a low-power-consumption strategy, and implement it.
20 * --> Add sysfs attributes for per-chip / per-HC IRQ coalescing thresholds.
22 * --> [Experiment, Marvell value added] Is it possible to use target
23 * mode to cross-connect two Linux boxes with Marvell cards? If so,
31 * 80x1-B2 errata PCI#11:
34 * should be careful to insert those cards only onto PCI-X bus #0,
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| D | pata_pdc2027x.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * Copyright (C) 1998-2002 Andre Hedrick <andre@linux-ide.org>
15 * as Documentation/driver-api/libata.rst
170 * port_mmio - Get the MMIO address of PDC2027x extended registers
171 * @ap: Port
176 return ap->host->iomap[PDC_MMIO_BAR] + ap->port_no * 0x100 + offset; in port_mmio()
180 * dev_mmio - Get the MMIO address of PDC2027x extended registers
181 * @ap: Port
187 u8 adj = (adev->devno) ? 0x08 : 0x00; in dev_mmio()
192 * pdc2027x_cable_detect - Probe host controller cable detect info
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| D | sata_vsc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sata_vsc.c - Vitesse VSC7174 4 port DPA SATA
6 * Please ALWAYS copy linux-ide@vger.kernel.org
14 * as Documentation/driver-api/libata.rst
27 #include <linux/dma-mapping.h>
67 /* Port stride */
88 return -EINVAL; in vsc_sata_scr_read()
89 *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4)); in vsc_sata_scr_read()
98 return -EINVAL; in vsc_sata_scr_write()
99 writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); in vsc_sata_scr_write()
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| D | pata_sis.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * pata_sis.c - SiS ATA driver
9 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
42 u16 device; /* PCI host ID */
67 while (lap->device) { in sis_short_ata40()
68 if (lap->device == dev->device && in sis_short_ata40()
69 lap->subvendor == dev->subsystem_vendor && in sis_short_ata40()
70 lap->subdevice == dev->subsystem_device) in sis_short_ata40()
79 * sis_old_port_base - return PCI configuration base for dev
82 * Returns the base of the PCI configuration registers for this port
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| D | sata_qstor.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sata_qstor.c - Pacific Digital Corporation QStor SATA
11 * as Documentation/driver-api/libata.rst
39 QS_HCF_CNFG3 = 0x0003, /* host configuration offset */
40 QS_HID_HPHY = 0x0004, /* host physical interface info */
42 QS_HST_SFF = 0x0100, /* host status fifo offset */
46 QS_HPHY_64BIT = (1 << 1), /* 64-bit bus detected */
50 /* per-channel register offsets */
53 QS_CFC_HUFT = 0x0800, /* host upstream fifo threshold */
54 QS_CFC_HDFT = 0x0804, /* host downstream fifo threshold */
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| D | pata_icside.c | 1 // SPDX-License-Identifier: GPL-2.0-only
59 } port[2]; member
71 const struct portinfo *port[2]; member
80 #define ICS_TYPE_NOTYPE ((unsigned int)-1)
82 /* ---------------- Version 5 PCB Support Functions --------------------- */
88 struct pata_icside_state *state = ec->irq_data; in pata_icside_irqenable_arcin_v5()
90 writeb(0, state->irq_port + ICS_ARCIN_V5_INTROFFSET); in pata_icside_irqenable_arcin_v5()
98 struct pata_icside_state *state = ec->irq_data; in pata_icside_irqdisable_arcin_v5()
100 readb(state->irq_port + ICS_ARCIN_V5_INTROFFSET); in pata_icside_irqdisable_arcin_v5()
109 /* ---------------- Version 6 PCB Support Functions --------------------- */
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| /linux-6.12.1/drivers/cxl/core/ |
| D | port.c | 1 // SPDX-License-Identifier: GPL-2.0-only
26 * cross-device interleave coordination. The CXL core also establishes and
42 int cxl_num_decoders_committed(struct cxl_port *port) in cxl_num_decoders_committed() argument
46 return port->commit_end + 1; in cxl_num_decoders_committed()
52 return sysfs_emit(buf, "%s\n", dev->type->name); in devtype_show()
58 if (dev->type == &cxl_nvdimm_bridge_type) in cxl_device_id()
60 if (dev->type == &cxl_nvdimm_type) in cxl_device_id()
62 if (dev->type == CXL_PMEM_REGION_TYPE()) in cxl_device_id()
64 if (dev->type == CXL_DAX_REGION_TYPE()) in cxl_device_id()
73 if (dev->type == CXL_REGION_TYPE()) in cxl_device_id()
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| /linux-6.12.1/Documentation/devicetree/bindings/pci/ |
| D | pci.txt | 3 PCI Bus Binding to: IEEE Std 1275-1994
4 https://www.devicetree.org/open-firmware/bindings/pci/pci2_1.pdf
9 https://www.devicetree.org/open-firmware/practice/imap/imap0_9d.pdf
11 Additionally to the properties specified in the above standards a host bridge
14 - linux,pci-domain:
15 If present this property assigns a fixed PCI domain number to a host bridge,
18 host bridges in the system, otherwise potentially conflicting domain numbers
19 may be assigned to root buses behind different host bridges. The domain
20 number for each host bridge in the system must be unique.
21 - max-link-speed:
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| /linux-6.12.1/tools/testing/selftests/net/lib/py/ |
| D | utils.py | 1 # SPDX-License-Identifier: GPL-2.0
17 … def __init__(self, comm, shell=True, fail=True, ns=None, background=False, host=None, timeout=5): argument
26 if host:
27 self.proc = host.cmd(comm)
41 self.stdout = stdout.decode("utf-8")
42 self.stderr = stderr.decode("utf-8")
48 if len(stderr) > 0 and stderr[-1] == "\n":
49 stderr = stderr[:-1]
55 def __init__(self, comm, shell=True, fail=None, ns=None, host=None, argument
58 shell=shell, fail=fail, ns=ns, host=host)
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| /linux-6.12.1/drivers/net/ethernet/sfc/ |
| D | filter.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2005-2013 Solarflare Communications Inc.
16 * enum efx_filter_match_flags - Flags for hardware filter match type
17 * @EFX_FILTER_MATCH_REM_HOST: Match by remote IP host address
18 * @EFX_FILTER_MATCH_LOC_HOST: Match by local IP host address
20 * @EFX_FILTER_MATCH_REM_PORT: Match by remote TCP/UDP port
22 * @EFX_FILTER_MATCH_LOC_PORT: Match by local TCP/UDP port
23 * @EFX_FILTER_MATCH_ETHER_TYPE: Match by Ether-type
33 * - Huntington supports filter matching controlled by firmware, potentially
34 * using {TCP,UDP}/IPv{4,6} 4-tuple or local 2-tuple, local MAC or I/G bit,
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| /linux-6.12.1/Documentation/ABI/stable/ |
| D | sysfs-driver-ib_srp | 1 What: /sys/class/infiniband_srp/srp-<hca>-<port_number>/add_target
4 Contact: linux-rdma@vger.kernel.org
7 a comma-separated list of login parameters to this sysfs
10 * id_ext, a 16-digit hexadecimal number specifying the eight
11 byte identifier extension in the 16-byte SRP target port
12 identifier. The target port identifier is sent by ib_srp
14 * ioc_guid, a 16-digit hexadecimal number specifying the eight
15 byte I/O controller GUID portion of the 16-byte target port
17 * dgid, a 32-digit hexadecimal number specifying the
19 * pkey, a four-digit hexadecimal number specifying the
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| /linux-6.12.1/drivers/pci/controller/ |
| D | pcie-mt7621.c | 1 // SPDX-License-Identifier: GPL-2.0+
35 /* MediaTek-specific configuration registers */
40 /* Host-PCI bridge registers */
67 * struct mt7621_pcie_port - PCIe port information
69 * @list: port list
70 * @pcie: pointer to PCIe host info
71 * @clk: pointer to the port clock gate
73 * @pcie_rst: pointer to port reset control
75 * @slot: port slot
76 * @enabled: indicates if port is enabled
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| /linux-6.12.1/tools/testing/vsock/ |
| D | README | 2 -------------------
3 These tests exercise net/vmw_vsock/ host<->guest sockets for VMware, KVM, and
4 Hyper-V.
8 * vsock_test - core AF_VSOCK socket functionality
9 * vsock_diag_test - vsock_diag.ko module for listing open sockets
15 2. Install the kernel and tests on the host.
21 # host=server, guest=client
22 (host)# $TEST_BINARY --mode=server \
23 --control-port=1234 \
24 --peer-cid=3
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| /linux-6.12.1/drivers/scsi/cxlflash/ |
| D | main.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
41 * process_cmd_err() - command error handler
49 struct afu *afu = cmd->parent; in process_cmd_err()
50 struct cxlflash_cfg *cfg = afu->parent; in process_cmd_err()
51 struct device *dev = &cfg->dev->dev; in process_cmd_err()
55 ioasa = &(cmd->sa); in process_cmd_err()
57 if (ioasa->rc.flags & SISL_RC_FLAGS_UNDERRUN) { in process_cmd_err()
58 resid = ioasa->resid; in process_cmd_err()
64 if (ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN) { in process_cmd_err()
67 scp->result = (DID_ERROR << 16); in process_cmd_err()
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| /linux-6.12.1/tools/usb/usbip/src/ |
| D | usbip_attach.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * 2005-2007 Takahiro Hirofuchi
5 * Copyright (C) 2015-2016 Samsung Electronics
29 " -r, --remote=<host> The machine with exported USB devices\n"
30 " -b, --busid=<busid> Busid of the device on <host>\n"
31 " -d, --device=<devid> Id of the virtual UDC on <host>\n";
39 static int record_connection(char *host, char *port, char *busid, int rhport) in record_connection() argument
54 return -1; in record_connection()
56 return -1; in record_connection()
58 return -1; in record_connection()
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| /linux-6.12.1/Documentation/driver-api/usb/ |
| D | usb3-debug-port.rst | 2 USB3 debug port
11 This is a HOWTO for using the USB3 debug port on x86 systems.
14 debug port, you need to::
16 1) check whether any USB3 debug port is available in
18 2) check which port is used for debugging purposes;
19 3) have a USB 3.0 super-speed A-to-A debugging cable.
25 functionality provided by the xHCI host controller. The xHCI
29 device through the debug port (normally the first USB3
30 super-speed port). The debug device is fully compliant with
32 performance full-duplex serial link between the debug target
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| /linux-6.12.1/Documentation/arch/x86/ |
| D | earlyprintk.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 Mini-HOWTO for using the earlyprintk=dbgp boot option with a
8 USB2 Debug port key and a debug cable, on x86 systems.
13 [host/target] <-------> [USB debug key] <-------> [client/console]
18 a) Host/target system needs to have USB debug port capability.
20 You can check this capability by looking at a 'Debug port' bit in
21 the lspci -vvv output::
23 # lspci -vvv
25 …roller: Intel Corporation 82801H (ICH8 Family) USB2 EHCI Controller #1 (rev 03) (prog-if 20 [EHCI])
27 …Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisIN…
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| /linux-6.12.1/tools/testing/selftests/net/forwarding/ |
| D | bridge_mdb.sh | 2 # SPDX-License-Identifier: GPL-2.0
4 # +-----------------------+ +------------------------+
15 # +----|------------------+ +----|-------------------+
17 # +----|--------------------------------------------------|-------------------+
19 # | +--|--------------------------------------------------|-----------------+ |
24 # | +-----------------------------------------------------------------------+ |
25 # +---------------------------------------------------------------------------+
147 bridge mdb add dev br0 port br0 grp $grp $state vid 10
149 check_err $? "Failed to add $name host entry"
151 bridge mdb replace dev br0 port br0 grp $grp $state vid 10 &> /dev/null
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| /linux-6.12.1/drivers/scsi/bnx2fc/ |
| D | bnx2fc_debug.c | 5 * Copyright (c) 2008-2013 Broadcom Corporation
6 * Copyright (c) 2014-2016 QLogic Corporation
7 * Copyright (c) 2016-2017 Cavium Inc.
30 if (io_req && io_req->port && io_req->port->lport && in BNX2FC_IO_DBG()
31 io_req->port->lport->host) in BNX2FC_IO_DBG()
32 shost_printk(KERN_INFO, io_req->port->lport->host, in BNX2FC_IO_DBG()
34 io_req->xid, &vaf); in BNX2FC_IO_DBG()
54 if (tgt && tgt->port && tgt->port->lport && tgt->port->lport->host && in BNX2FC_TGT_DBG()
55 tgt->rport) in BNX2FC_TGT_DBG()
56 shost_printk(KERN_INFO, tgt->port->lport->host, in BNX2FC_TGT_DBG()
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| /linux-6.12.1/drivers/scsi/libfc/ |
| D | fc_lport.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Maintained at www.Open-FCoE.org
9 * PORT LOCKING NOTES
11 * These comments only apply to the 'port code' which consists of the lport,
27 * be held while attempting to acquire a greater lock. Here is the hierarchy-
42 * single-threaded workqueue. An rport would never be free'd while in a
92 /* Fabric IDs to use for point-to-point mode, chosen on whims. */
134 * struct fc_bsg_info - FC Passthrough managemet structure
136 * @lport: The local port to pass through a command
138 * @sg: job->reply_payload.sg_list
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