Searched +full:hisi +full:- +full:spmi +full:- +full:controller (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/spmi/hisilicon,hisi-spmi-controller.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: HiSilicon SPMI controller10 - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>13 The HiSilicon SPMI BUS controller is found on some Kirin-based designs.14 It is a MIPI System Power Management (SPMI) controller.17 Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml.20 - $ref: spmi.yaml#[all …]
1 # SPDX-License-Identifier: GPL-2.0-only3 # Makefile for kernel SPMI framework.5 obj-$(CONFIG_SPMI) += spmi.o spmi-devres.o7 obj-$(CONFIG_SPMI_HISI3670) += hisi-spmi-controller.o8 obj-$(CONFIG_SPMI_MSM_PMIC_ARB) += spmi-pmic-arb.o9 obj-$(CONFIG_SPMI_MTK_PMIF) += spmi-mtk-pmif.o
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/mfd/hisilicon,hi6421-spmi-pmic.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: HiSilicon 6421v600 SPMI PMIC10 - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>14 (SPMI) bus. It provides interrupts and power supply.16 The GPIO and interrupt settings are represented as part of the top-level PMIC19 The SPMI controller part is provided by20 Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.yaml[all …]
5 ---------------------------------------------------21 W: *Web-page* with status/info23 B: URI for where to file *bugs*. A web-page with detailed bug28 patches to the given subsystem. This is either an in-tree file,29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst46 N: [^a-z]tegra all files whose path contains tegra64 ----------------83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)85 L: linux-scsi@vger.kernel.org88 F: drivers/scsi/3w-*[all …]