/linux-6.12.1/Documentation/devicetree/bindings/phy/ |
D | amlogic,meson8-hdmi-tx-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/phy/amlogic,meson8-hdmi-tx-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Amlogic Meson8, Meson8b and Meson8m2 HDMI TX PHY 10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com> 13 The HDMI TX PHY node should be the child of a syscon node with the 16 compatible = "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon" 23 pattern: "^hdmi-phy@[0-9a-f]+$" 27 - items: [all …]
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D | mediatek,hdmi-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/phy/mediatek,hdmi-phy.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: MediaTek High Definition Multimedia Interface (HDMI) PHY 11 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 12 - Philipp Zabel <p.zabel@pengutronix.de> 13 - Chunfeng Yun <chunfeng.yun@mediatek.com> 16 The HDMI PHY serializes the HDMI encoder's three channel 10-bit parallel 17 output and drives the HDMI pads. [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/display/msm/ |
D | qcom,mdss.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dmitry Baryshkov <dmitry.baryshkov@linaro.org> 11 - Rob Clark <robdclark@gmail.com> 15 encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc. 19 pattern: "^display-subsystem@[0-9a-f]+$" 23 - qcom,mdss 29 reg-names: 32 - const: mdss_phys [all …]
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D | hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $id: http://devicetree.org/schemas/display/msm/hdmi.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Qualcomm Adreno/Snapdragon HDMI output 11 - Rob Clark <robdclark@gmail.com> 16 - qcom,hdmi-tx-8084 17 - qcom,hdmi-tx-8660 18 - qcom,hdmi-tx-8960 19 - qcom,hdmi-tx-8974 [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/display/rockchip/ |
D | rockchip,dw-hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Rockchip DWC HDMI TX Encoder 10 - Mark Yao <markyao0591@gmail.com> 13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP 14 with a companion PHY IP. 17 - $ref: ../bridge/synopsys,dw-hdmi.yaml# 18 - $ref: /schemas/sound/dai-common.yaml# [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/display/ |
D | allwinner,sun8i-a83t-dw-hdmi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-dw-hdmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Allwinner A83t DWC HDMI TX Encoder 10 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller 11 IP with Allwinner\'s own PHY IP. It supports audio and video outputs 14 These DT bindings follow the Synopsys DWC HDMI TX bindings defined 15 in bridge/synopsys,dw-hdmi.yaml with the following device-specific 19 - Chen-Yu Tsai <wens@csie.org> [all …]
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D | amlogic,meson-dw-hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/display/amlogic,meson-dw-hdmi.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Amlogic specific extensions to the Synopsys Designware HDMI Controller 11 - Neil Armstrong <neil.armstrong@linaro.org> 14 - $ref: /schemas/sound/dai-common.yaml# 18 - A Synopsys DesignWare HDMI Controller IP 19 - A TOP control block controlling the Clocks and PHY 20 - A custom HDMI PHY in order to convert video to TMDS signal [all …]
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D | brcm,bcm2711-hdmi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/brcm,bcm2711-hdmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Broadcom BCM2711 HDMI Controller 10 - Eric Anholt <eric@anholt.net> 15 - brcm,bcm2711-hdmi0 16 - brcm,bcm2711-hdmi1 20 - description: HDMI controller register range 21 - description: DVP register range [all …]
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/linux-6.12.1/drivers/gpu/drm/bridge/imx/ |
D | imx8mp-hdmi-tx.c | 1 // SPDX-License-Identifier: GPL-2.0+ 25 struct imx8mp_hdmi *hdmi = (struct imx8mp_hdmi *)data; in imx8mp_hdmi_mode_valid() local 27 if (mode->clock < 13500) in imx8mp_hdmi_mode_valid() 30 if (mode->clock > 297000) in imx8mp_hdmi_mode_valid() 33 if (clk_round_rate(hdmi->pixclk, mode->clock * 1000) != in imx8mp_hdmi_mode_valid() 34 mode->clock * 1000) in imx8mp_hdmi_mode_valid() 37 /* We don't support double-clocked and Interlaced modes */ in imx8mp_hdmi_mode_valid() 38 if ((mode->flags & DRM_MODE_FLAG_DBLCLK) || in imx8mp_hdmi_mode_valid() 39 (mode->flags & DRM_MODE_FLAG_INTERLACE)) in imx8mp_hdmi_mode_valid() 56 static void im8mp_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data) in im8mp_hdmi_phy_setup_hpd() argument [all …]
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/linux-6.12.1/drivers/phy/amlogic/ |
D | phy-meson8-hdmi-tx.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Meson8, Meson8b and Meson8m2 HDMI TX PHY. 14 #include <linux/phy/phy.h> 40 static int phy_meson8_hdmi_tx_init(struct phy *phy) in phy_meson8_hdmi_tx_init() argument 42 struct phy_meson8_hdmi_tx_priv *priv = phy_get_drvdata(phy); in phy_meson8_hdmi_tx_init() 44 return clk_prepare_enable(priv->tmds_clk); in phy_meson8_hdmi_tx_init() 47 static int phy_meson8_hdmi_tx_exit(struct phy *phy) in phy_meson8_hdmi_tx_exit() argument 49 struct phy_meson8_hdmi_tx_priv *priv = phy_get_drvdata(phy); in phy_meson8_hdmi_tx_exit() 51 clk_disable_unprepare(priv->tmds_clk); in phy_meson8_hdmi_tx_exit() 56 static int phy_meson8_hdmi_tx_power_on(struct phy *phy) in phy_meson8_hdmi_tx_power_on() argument [all …]
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D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 # Phy drivers for Amlogic platforms 6 tristate "Meson8, Meson8b and Meson8m2 HDMI TX PHY driver" 11 Enable this to support the HDMI TX PHYs found in Meson8, 16 tristate "Meson8, Meson8b, Meson8m2 and GXBB USB2 PHY driver" 29 tristate "Meson GXL and GXM USB2 PHY drivers" 53 tristate "Meson G12A USB2 PHY driver" 64 tristate "Meson G12A USB3+PCIE Combo PHY driver" 70 Enable this to support the Meson USB3 + PCIE Combo PHY found 75 tristate "Meson AXG PCIE PHY driver" [all …]
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/linux-6.12.1/drivers/gpu/drm/msm/hdmi/ |
D | hdmi.c | 1 // SPDX-License-Identifier: GPL-2.0-only 16 #include <sound/hdmi-codec.h> 17 #include "hdmi.h" 19 void msm_hdmi_set_mode(struct hdmi *hdmi, bool power_on) in msm_hdmi_set_mode() argument 24 spin_lock_irqsave(&hdmi->reg_lock, flags); in msm_hdmi_set_mode() 27 if (!hdmi->hdmi_mode) { in msm_hdmi_set_mode() 29 hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); in msm_hdmi_set_mode() 38 hdmi_write(hdmi, REG_HDMI_CTRL, ctrl); in msm_hdmi_set_mode() 39 spin_unlock_irqrestore(&hdmi->reg_lock, flags); in msm_hdmi_set_mode() 40 DBG("HDMI Core: %s, HDMI_CTRL=0x%08x", in msm_hdmi_set_mode() [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/soc/imx/ |
D | fsl,imx8mp-hdmi-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MP HDMI blk-ctrl 10 - Lucas Stach <l.stach@pengutronix.de> 13 The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to 15 peripherals located in the HDMI domain of the SoC. 20 - const: fsl,imx8mp-hdmi-blk-ctrl 21 - const: syscon [all …]
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/linux-6.12.1/arch/arm64/boot/dts/amlogic/ |
D | meson-gxbb-odroidc2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-gxbb.dtsi" 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/sound/meson-aiu.h> 15 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb"; 16 model = "Hardkernel ODROID-C2"; 24 stdout-path = "serial0:115200n8"; 32 usb_otg_pwr: regulator-usb-pwrs { 33 compatible = "regulator-fixed"; [all …]
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D | meson-gxbb-nanopi-k2.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include "meson-gxbb.dtsi" 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/sound/meson-aiu.h> 13 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb"; 22 stdout-path = "serial0:115200n8"; 31 compatible = "gpio-leds"; 33 led-stat { 34 label = "nanopi-k2:blue:stat"; [all …]
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D | meson-g12b-ugoos-am6.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 /dts-v1/; 10 #include "meson-g12b-w400.dtsi" 11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h> 17 spdif_dit: audio-codec-1 { 18 #sound-dai-cells = <0>; 19 compatible = "linux,spdif-dit"; 20 sound-name-prefix = "DIT"; 24 compatible = "amlogic,axg-sound-card"; 25 model = "UGOOS-AM6"; [all …]
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D | meson-khadas-vim3.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/gpio/meson-g12a-gpio.h> 11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h> 22 stdout-path = "serial0:115200n8"; 30 adc-keys { 31 compatible = "adc-keys"; 32 io-channels = <&saradc 2>; 33 io-channel-names = "buttons"; [all …]
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D | meson-g12b-bananapi.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/gpio/meson-g12a-gpio.h> 11 #include <dt-bindings/sound/meson-g12a-tohdmitx.h> 21 stdout-path = "serial0:115200n8"; 29 adc-keys { 30 compatible = "adc-keys"; 31 io-channels = <&saradc 2>; 32 io-channel-names = "buttons"; [all …]
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/linux-6.12.1/drivers/gpu/drm/meson/ |
D | meson_dw_hdmi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 32 #define DRIVER_NAME "meson-dw-hdmi" 33 #define DRIVER_DESC "Amlogic Meson HDMI-TX DRM driver" 36 * DOC: HDMI Output 38 * HDMI Output is composed of : 40 * - A Synopsys DesignWare HDMI Controller IP 41 * - A TOP control block controlling the Clocks and PHY 42 * - A custom HDMI PHY in order convert video to TMDS signal 47 * | HDMI TOP |<= HPD 50 * | Synopsys HDMI | HDMI PHY |=> TMDS [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/display/bridge/ |
D | renesas,dw-hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/renesas,dw-hdmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car DWC HDMI TX Encoder 10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP 14 with a companion PHY IP. 17 - $ref: synopsys,dw-hdmi.yaml# 22 - enum: [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/display/samsung/ |
D | samsung,exynos-hdmi.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos SoC HDMI 10 - Inki Dae <inki.dae@samsung.com> 11 - Seung-Woo Kim <sw0312.kim@samsung.com> 12 - Kyungmin Park <kyungmin.park@samsung.com> 13 - Krzysztof Kozlowski <krzk@kernel.org> 18 - samsung,exynos4210-hdmi [all …]
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/linux-6.12.1/arch/arm/boot/dts/mediatek/ |
D | mt7623n.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright © 2017-2020 MediaTek Inc. 10 #include <dt-bindings/memory/mt2701-larb-port.h> 19 compatible = "mediatek,mt7623-g3dsys", 20 "mediatek,mt2701-g3dsys", 23 #clock-cells = <1>; 24 #reset-cells = <1>; 28 compatible = "mediatek,mt7623-mali", "arm,mali-450"; 41 interrupt-names = "gp", "gpmmu", "pp0", "ppmmu0", "pp1", 46 clock-names = "bus", "core"; [all …]
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/linux-6.12.1/drivers/phy/mediatek/ |
D | phy-mtk-hdmi.c | 1 // SPDX-License-Identifier: GPL-2.0 7 #include "phy-mtk-hdmi.h" 9 static int mtk_hdmi_phy_power_on(struct phy *phy); 10 static int mtk_hdmi_phy_power_off(struct phy *phy); 11 static int mtk_hdmi_phy_configure(struct phy *phy, union phy_configure_opts *opts); 25 static int mtk_hdmi_phy_power_on(struct phy *phy) in mtk_hdmi_phy_power_on() argument 27 struct mtk_hdmi_phy *hdmi_phy = phy_get_drvdata(phy); in mtk_hdmi_phy_power_on() 30 ret = clk_prepare_enable(hdmi_phy->pll); in mtk_hdmi_phy_power_on() 34 hdmi_phy->conf->hdmi_phy_enable_tmds(hdmi_phy); in mtk_hdmi_phy_power_on() 38 static int mtk_hdmi_phy_power_off(struct phy *phy) in mtk_hdmi_phy_power_off() argument [all …]
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/linux-6.12.1/drivers/gpu/drm/bridge/synopsys/ |
D | dw-hdmi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * DesignWare High-Definition Multimedia Interface (HDMI) driver 5 * Copyright (C) 2013-2015 Mentor Graphics Inc. 6 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. 12 #include <linux/hdmi.h> 20 #include <linux/dma-mapping.h> 23 #include <media/cec-notifier.h> 25 #include <uapi/linux/media-bus-format.h> 39 #include "dw-hdmi-audio.h" 40 #include "dw-hdmi-cec.h" [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/display/imx/ |
D | fsl,imx6-hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/imx/fsl,imx6-hdmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale i.MX6 DWC HDMI TX Encoder 10 - Philipp Zabel <p.zabel@pengutronix.de> 13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP 14 with a companion PHY IP. 17 - $ref: ../bridge/synopsys,dw-hdmi.yaml# 22 - fsl,imx6dl-hdmi [all …]
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