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Searched +full:hb +full:- +full:sregs (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dcalxeda.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 "hb-sregs" node.
16 - Andre Przywara <andre.przywara@arm.com>
19 "#clock-cells":
24 - calxeda,hb-pll-clock
25 - calxeda,hb-a9periph-clock
26 - calxeda,hb-a9bus-clock
27 - calxeda,hb-emmc-clock
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/linux-6.12.1/Documentation/devicetree/bindings/arm/calxeda/
Dhb-sregs.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/calxeda/hb-sregs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Andre Przywara <andre.przywara@arm.com>
19 const: calxeda,hb-sregs
28 - compatible
29 - reg
34 - |
35 sregs@fff3c000 {
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Dl2ecc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Andre Przywara <andre.przywara@arm.com>
19 const: calxeda,hb-sregs-l2-ecc
26 - description: single bit error interrupt
27 - description: double bit error interrupt
30 - compatible
31 - reg
32 - interrupts
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/linux-6.12.1/arch/arm/boot/dts/calxeda/
Decx-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2011-2012 Calxeda, Inc.
20 #address-cells = <1>;
21 #size-cells = <1>;
22 compatible = "simple-bus";
23 interrupt-parent = <&intc>;
26 compatible = "calxeda,hb-ahci";
29 dma-coherent;
30 calxeda,port-phys = < &combophy5 0>, <&combophy0 0>,
33 calxeda,sgpio-gpio =<&gpioh 5 1>, <&gpioh 6 1>,
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Dhighbank.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2011-2012 Calxeda, Inc.
6 /dts-v1/;
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "arm,cortex-a9";
25 next-level-cache = <&L2>;
27 clock-names = "cpu";
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/linux-6.12.1/arch/arm/mach-highbank/
Dhighbank.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2010-2011 Calxeda, Inc.
8 #include <linux/dma-map-ops.h>
12 #include <linux/pl320-ipc.h>
21 #include <asm/hardware/cache-l2x0.h>
55 if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9")) in highbank_init_irq()
71 int reg = -1; in highbank_platform_notifier()
78 if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci")) in highbank_platform_notifier()
80 else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci")) in highbank_platform_notifier()
82 else if (of_device_is_compatible(dev->of_node, "arm,pl330")) in highbank_platform_notifier()
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/linux-6.12.1/drivers/clk/
Dclk-highbank.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2011-2012 Calxeda, Inc.
9 #include <linux/clk-provider.h>
48 reg = readl(hbclk->reg); in clk_pll_prepare()
50 writel(reg, hbclk->reg); in clk_pll_prepare()
52 while ((readl(hbclk->reg) & HB_PLL_LOCK) == 0) in clk_pll_prepare()
54 while ((readl(hbclk->reg) & HB_PLL_LOCK_500) == 0) in clk_pll_prepare()
65 reg = readl(hbclk->reg); in clk_pll_unprepare()
67 writel(reg, hbclk->reg); in clk_pll_unprepare()
75 reg = readl(hbclk->reg); in clk_pll_enable()
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/linux-6.12.1/drivers/edac/
Dhighbank_l2_edac.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2011-2012 Calxeda, Inc.
28 struct hb_l2_drvdata *drvdata = dci->pvt_info; in highbank_l2_err_handler()
30 if (irq == drvdata->sb_irq) { in highbank_l2_err_handler()
31 writel(1, drvdata->base + SR_CLR_SB_ECC_INTR); in highbank_l2_err_handler()
32 edac_device_handle_ce(dci, 0, 0, dci->ctl_name); in highbank_l2_err_handler()
34 if (irq == drvdata->db_irq) { in highbank_l2_err_handler()
35 writel(1, drvdata->base + SR_CLR_DB_ECC_INTR); in highbank_l2_err_handler()
36 edac_device_handle_ue(dci, 0, 0, dci->ctl_name); in highbank_l2_err_handler()
43 { .compatible = "calxeda,hb-sregs-l2-ecc", },
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