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/linux-6.12.1/arch/arm/boot/dts/ti/omap/
Domap5-uevm.dts76 gpios = <&gpio9 17 GPIO_ACTIVE_HIGH>;
83 gpios = <&gpio9 18 GPIO_ACTIVE_HIGH>;
90 gpios = <&gpio9 19 GPIO_ACTIVE_HIGH>;
97 gpios = <&gpio9 2 GPIO_ACTIVE_HIGH>;
104 gpios = <&gpio9 3 GPIO_ACTIVE_HIGH>;
111 gpios = <&gpio9 4 GPIO_ACTIVE_HIGH>;
118 gpios = <&gpio9 5 GPIO_ACTIVE_HIGH>;
125 gpios = <&gpio9 6 GPIO_ACTIVE_HIGH>;
149 gpio9: gpio@22 { label
186 gpios = <&gpio9 0 GPIO_ACTIVE_HIGH>, /* TCA6424A P01, CT CP HPD */
[all …]
/linux-6.12.1/arch/arm/boot/dts/nxp/vf/
Dvf610-zii-scu4-aib.dts345 los-gpios = <&gpio9 0 GPIO_ACTIVE_HIGH>;
352 los-gpios = <&gpio9 1 GPIO_ACTIVE_HIGH>;
359 los-gpios = <&gpio9 2 GPIO_ACTIVE_HIGH>;
366 los-gpios = <&gpio9 3 GPIO_ACTIVE_HIGH>;
373 los-gpios = <&gpio9 4 GPIO_ACTIVE_HIGH>;
380 los-gpios = <&gpio9 5 GPIO_ACTIVE_HIGH>;
387 los-gpios = <&gpio9 6 GPIO_ACTIVE_HIGH>;
394 los-gpios = <&gpio9 7 GPIO_ACTIVE_HIGH>;
401 los-gpios = <&gpio9 8 GPIO_ACTIVE_HIGH>;
408 los-gpios = <&gpio9 9 GPIO_ACTIVE_HIGH>;
[all …]
/linux-6.12.1/drivers/pinctrl/
Dpinctrl-tps6594.c79 PINCTRL_PIN(8, "GPIO8"), PINCTRL_PIN(9, "GPIO9"),
85 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",
90 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",
95 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",
100 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",
105 "GPIO6", "GPIO7", "GPIO8", "GPIO9", "GPIO10",
151 "GPIO9",
164 "GPIO9",
Dpinctrl-xway.c124 MFP_XWAY(GPIO9, GPIO, SPI, MII, JTAG),
155 static const unsigned ase_pins_jtag[] = {GPIO7, GPIO8, GPIO9, GPIO10, GPIO11};
165 static const unsigned ase_pins_spi[] = {GPIO8, GPIO9, GPIO10}; /* DEPRECATED */
167 static const unsigned ase_pins_spi_do[] = {GPIO9};
252 MFP_XWAY(GPIO9, GPIO, ASC, SPI, MII),
285 static const unsigned danube_pins_asc0_cts_rts[] = {GPIO9, GPIO10};
311 static const unsigned danube_pins_spi_cs5[] = {GPIO9};
427 MFP_XWAY(GPIO9, GPIO, ASC, SPI, EXIN),
476 static const unsigned xrx100_exin_pin_map[] = {GPIO0, GPIO1, GPIO2, GPIO39, GPIO10, GPIO9};
483 static const unsigned xrx100_pins_exin5[] = {GPIO9};
[all …]
/linux-6.12.1/drivers/pinctrl/qcom/
Dpinctrl-sm8650-lpass-lpi.c67 PINCTRL_PIN(9, "gpio9"),
85 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
93 static const char * const dmic2_data_groups[] = { "gpio9" };
103 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
126 static const char * const ext_mclk1_b_groups[] = { "gpio9" };
Dpinctrl-sm8550-lpass-lpi.c65 PINCTRL_PIN(9, "gpio9"),
83 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
91 static const char * const dmic2_data_groups[] = { "gpio9" };
101 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
122 static const char * const ext_mclk1_b_groups[] = { "gpio9" };
Dpinctrl-sc8280xp-lpass-lpi.c58 PINCTRL_PIN(9, "gpio9"),
77 static const char * const dmic2_data_groups[] = { "gpio9" };
89 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
99 static const char * const ext_mclk1_b_groups[] = { "gpio9" };
Dpinctrl-sm8450-lpass-lpi.c65 PINCTRL_PIN(9, "gpio9"),
88 static const char * const dmic2_data_groups[] = { "gpio9" };
100 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
115 static const char * const ext_mclk1_b_groups[] = { "gpio9" };
Dpinctrl-sm8250-lpass-lpi.c49 PINCTRL_PIN(9, "gpio9"),
63 static const char * const dmic2_data_groups[] = { "gpio9" };
73 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
Dpinctrl-sc7280-lpass-lpi.c49 PINCTRL_PIN(9, "gpio9"),
64 static const char * const dmic2_data_groups[] = { "gpio9" };
74 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
Dpinctrl-sm4250-lpass-lpi.c70 PINCTRL_PIN(9, "gpio9"),
93 static const char * const dmic23_data_groups[] = { "gpio9" };
99 static const char * const ext_mclk1_b_groups[] = { "gpio9" };
104 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
Dpinctrl-sm8350-lpass-lpi.c49 PINCTRL_PIN(9, "gpio9"),
64 static const char * const dmic2_data_groups[] = { "gpio9" };
74 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
Dpinctrl-sm6115-lpass-lpi.c49 PINCTRL_PIN(9, "gpio9"),
64 static const char * const dmic23_data_groups[] = { "gpio9" };
66 static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
Dpinctrl-ipq8074.c324 "gpio9", /* CS_CSR_LCD */
340 "gpio0", "gpio2", "gpio9", "gpio16",
348 "gpio0", "gpio2", "gpio9",
360 "gpio0", "gpio2", "gpio9", "gpio16",
412 "gpio9", "gpio16",
416 "gpio9", "gpio16",
420 "gpio9",
781 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
Dpinctrl-ipq5332.c265 "gpio8", "gpio9", "gpio10", "gpio11", "gpio12", "gpio13", "gpio14",
295 "gpio9",
519 "gpio8", "gpio9", "gpio10", "gpio11",
563 "gpio9",
591 "gpio8", "gpio9", "gpio10", "gpio11",
615 "gpio8", "gpio9", "gpio10", "gpio11",
/linux-6.12.1/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
Dpwrseq.h91 /*Enable GPIO9 interrupt mode*/ \
94 /*Enable GPIO9 input mode*/ \
100 /*Enable HSISR GPIO9 interrupt*/ \
103 /*For GPIO9 internal pull high setting by test chip*/ \
106 /*For GPIO9 internal pull high setting*/ \
203 /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \
229 /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \
/linux-6.12.1/arch/mips/boot/dts/pic32/
Dpic32mzda.dtsi23 gpio9 = &gpio9;
215 gpio9: gpio9@1f860900 { label
/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dqcom,pmic-gpio.yaml443 - gpio1-gpio9 for pm6125
446 - gpio1-gpio9 for pm6350
447 - gpio1-gpio9 for pm6450
463 - gpio1-gpio9 for pm8350c
490 - gpio1-gpio12 for pms405 (holes on gpio1, gpio9
Dbrcm,bcm6318-pinctrl.yaml39 gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, gpio40 ]
119 pins = "gpio9";
Dbrcm,bcm63268-pinctrl.yaml39 enum: [ gpio0, gpio1, gpio16, gpio17, gpio8, gpio9, gpio18, gpio19,
93 pins = "gpio9";
Dbrcm,bcm6362-pinctrl.yaml41 gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, gpio14,
113 pins = "gpio9";
Dbrcm,bcm6368-pinctrl.yaml41 gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, gpio14,
114 pins = "gpio9";
/linux-6.12.1/drivers/staging/rtl8723bs/include/
Dhal_pwr_seq.h57 …SK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 interrupt mode*/\
58 …B_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0},/*Enable GPIO9 input mode*/\
60 …K, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR GPIO9 interrupt*/\
61 …MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT3, BIT3},/*For GPIO9 internal pull high…
62 …MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT6, BIT6},/*For GPIO9 internal pull high…
104 …_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 1}, /*0x48[16] = 1 to enable GPIO9 as EXT WAKEUP*/ \
115 …MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT0, 0}, /*0x48[16] = 0 to disable GPIO9 as EXT WAKEUP*/ \
/linux-6.12.1/drivers/pinctrl/bcm/
Dpinctrl-bcm6318.c49 PINCTRL_PIN(9, "gpio9"),
153 BCM_PIN_GROUP(gpio9),
207 "gpio9",
270 "gpio9",
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3566-soquartz-blade.dts106 * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3
158 * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch

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