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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dqcom,pmic-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC GPIO block
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 This binding describes the GPIO block(s) found in the 8xxx series of
19 - enum:
20 - qcom,pm2250-gpio
21 - qcom,pm660-gpio
[all …]
Dqcom,tlmm-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,tlmm-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
23 interrupt-controller: true
25 '#interrupt-cells':
28 include/dt-bindings/interrupt-controller/irq.h
31 gpio-controller: true
33 '#gpio-cells':
[all …]
Dcypress,cy8c95x0.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cypress CY8C95X0 I2C GPIO expander
10 - Patrick Rudolph <patrick.rudolph@9elements.com>
13 This supports the 20/40/60 pin Cypress CYC95x0 GPIO I2C expanders.
14 Pin function configuration is performed on a per-pin basis.
19 - cypress,cy8c9520
20 - cypress,cy8c9540
21 - cypress,cy8c9560
[all …]
Dqcom,msm8998-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8998-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
18 const: qcom,msm8998-pinctrl
26 gpio-reserved-ranges:
30 gpio-line-names:
34 "-state$":
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/mfd/
Dadi,adp5585.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
19 - enum:
20 - adi,adp5585-00 # Default
21 - adi,adp5585-01 # 11 GPIOs
22 - adi,adp5585-02 # No pull-up resistors by default on special pins
23 - adi,adp5585-03 # Alternate I2C address
24 - adi,adp5585-04 # Pull-down resistors on all pins by default
[all …]
/linux-6.12.1/arch/arm/boot/dts/st/
Dstm32f769-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
7 #include "stm32f7-pinctrl.dtsi"
10 compatible = "st,stm32f769-pinctrl";
12 gpioa: gpio@40020000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@40020400 {
17 gpio-ranges = <&pinctrl 0 16 16>;
20 gpioc: gpio@40020800 {
21 gpio-ranges = <&pinctrl 0 32 16>;
[all …]
Dstm32f746-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
7 #include "stm32f7-pinctrl.dtsi"
10 compatible = "st,stm32f746-pinctrl";
12 gpioa: gpio@40020000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@40020400 {
17 gpio-ranges = <&pinctrl 0 16 16>;
20 gpioc: gpio@40020800 {
21 gpio-ranges = <&pinctrl 0 32 16>;
[all …]
Dstm32mp15xxaa-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
Dstm32mp15xxad-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
Dstm32mp15xxab-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
Dstm32mp15xxac-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/st/
Dstm32mp25xxai-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
10 gpioa: gpio@44240000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@44250000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@44260000 {
25 gpio-ranges = <&pinctrl 0 32 14>;
28 gpiod: gpio@44270000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
Dstm32mp25xxak-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
10 gpioa: gpio@44240000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@44250000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@44260000 {
25 gpio-ranges = <&pinctrl 0 32 14>;
28 gpiod: gpio@44270000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
Dstm32mp25xxal-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
10 gpioa: gpio@44240000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@44250000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@44260000 {
25 gpio-ranges = <&pinctrl 0 32 14>;
28 gpiod: gpio@44270000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/gpio/
Drenesas,rcar-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/renesas,rcar-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car General-Purpose Input/Output Ports (GPIO)
10 - Geert Uytterhoeven <geert+renesas@glider.be>
15 - items:
16 - enum:
17 - renesas,gpio-r8a7778 # R-Car M1
18 - renesas,gpio-r8a7779 # R-Car H1
[all …]
Dgpio.txt1 Specifying GPIO information for devices
5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
14 GPIO properties can contain one or more GPIO phandles, but only in exceptional
23 The following example could be used to describe GPIO pins used as device enable
24 and bit-banged data signals:
27 gpio-controller;
28 #gpio-cells = <2>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsa8540p-pmics.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/spmi/spmi.h>
12 compatible = "qcom,pm8150", "qcom,spmi-pmic";
14 #address-cells = <1>;
15 #size-cells = <0>;
18 compatible = "qcom,pm8941-rtc";
20 reg-names = "rtc", "alarm";
22 wakeup-source;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-am62p-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "ti,am62-usb";
14 clock-names = "ref";
15 ti,syscon-phy-pll-refclk = <&usb1_phy_ctrl 0x0>;
16 #address-cells = <2>;
17 #size-cells = <2>;
18 power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
19 ranges;
27 interrupt-names = "host", "peripheral";
[all …]
Dk3-j7200-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
[all …]
Dk3-am62p-j722s-common-mcu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "pinctrl-single";
12 #pinctrl-cells = <1>;
13 pinctrl-single,register-width = <32>;
14 pinctrl-single,function-mask = <0xffffffff>;
15 pinctrl-single,gpio-range =
19 bootph-all;
21 mcu_pmx_range: gpio-range {
22 #pinctrl-single,gpio-range-cells = <3>;
[all …]
Dk3-j721e-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
[all …]
Dk3-j784s4-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
9 sms: system-controller@44083000 {
10 bootph-all;
11 compatible = "ti,k2g-sci";
12 ti,host-id = <12>;
14 mbox-names = "rx", "tx";
19 reg-names = "debug_messages";
22 k3_pds: power-controller {
23 bootph-all;
[all …]
Dk3-j721s2-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
9 sms: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
[all …]
/linux-6.12.1/arch/mips/boot/dts/pic32/
Dpic32mzda.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2015 Microchip Technology Inc. All rights reserved.
5 #include <dt-bindings/clock/microchip,pic32-clock.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&evic>;
33 #address-cells = <1>;
34 #size-cells = <0>;
43 compatible = "microchip,pic32mzda-infra";
[all …]
/linux-6.12.1/drivers/gpio/
Dgpio-bd71828.c1 // SPDX-License-Identifier: GPL-2.0-only
4 #include <linux/gpio/driver.h>
5 #include <linux/mfd/rohm-bd71828.h>
16 struct gpio_chip gpio; member
28 * we are dealing with - then we are done in bd71828_gpio_set()
33 ret = regmap_update_bits(bdgpio->regmap, GPIO_OUT_REG(offset), in bd71828_gpio_set()
36 dev_err(bdgpio->dev, "Could not set gpio to %d\n", value); in bd71828_gpio_set()
46 ret = regmap_read(bdgpio->regmap, BD71828_REG_IO_STAT, in bd71828_gpio_get()
49 ret = regmap_read(bdgpio->regmap, GPIO_OUT_REG(offset), in bd71828_gpio_get()
63 return -ENOTSUPP; in bd71828_gpio_set_config()
[all …]

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