Searched full:gmii (Results 1 – 25 of 173) sorted by relevance
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| /linux-6.12.1/Documentation/devicetree/bindings/phy/ |
| D | ti,phy-gmii-sel.yaml | 5 $id: http://devicetree.org/schemas/phy/ti,phy-gmii-sel.yaml#
26 | |Port 1..<--+-->GMII/MII<------->
51 - ti,am3352-phy-gmii-sel
52 - ti,dra7xx-phy-gmii-sel
53 - ti,am43xx-phy-gmii-sel
54 - ti,dm814-phy-gmii-sel
55 - ti,am654-phy-gmii-sel
56 - ti,j7200-cpsw5g-phy-gmii-sel
57 - ti,j721e-cpsw9g-phy-gmii-sel
58 - ti,j784s4-cpsw9g-phy-gmii-sel
[all …]
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| /linux-6.12.1/Documentation/devicetree/bindings/net/ |
| D | xlnx,gmii-to-rgmii.yaml | 4 $id: http://devicetree.org/schemas/net/xlnx,gmii-to-rgmii.yaml#
7 title: Xilinx GMII to RGMII Converter
13 The Gigabit Media Independent Interface (GMII) to Reduced Gigabit Media
24 const: xlnx,gmii-to-rgmii-1.0
55 compatible = "xlnx,gmii-to-rgmii-1.0";
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| D | socfpga-dwmac.txt | 32 - compatible : Should be altr,gmii-to-sgmii-2.0
38 compatible = "altr,gmii-to-sgmii-2.0";
56 altr,gmii-to-sgmii-converter = <&gmii_to_sgmii_converter>;
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| D | cpsw-phy-sel.txt | 21 reg-names = "gmii-sel";
28 reg-names = "gmii-sel";
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| D | snps,dwc-qos-ethernet.txt | 29 In some configurations (e.g. GMII/RGMII), this clock also drives the PHY TX
34 In some configurations (e.g. GMII/RGMII), this clock is derived from the
146 phy-mode = "gmii";
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| D | microchip,lan966x-switch.yaml | 98 - gmii
158 phy-mode = "gmii";
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| D | qca,ar71xx.yaml | 97 phy-mode = "gmii";
128 phy-mode = "gmii";
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| D | cpsw.txt | 48 - phys : phandle on phy-gmii-sel PHY (see phy/ti-phy-gmii-sel.txt)
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| D | ti,cpsw-switch.yaml | 16 gigabit media independent interface (GMII),reduced gigabit media
104 description: phandle on phy-gmii-sel PHY
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| /linux-6.12.1/drivers/phy/ti/ |
| D | phy-gmii-sel.c | 259 .compatible = "ti,am3352-phy-gmii-sel",
263 .compatible = "ti,dra7xx-phy-gmii-sel",
267 .compatible = "ti,am43xx-phy-gmii-sel",
271 .compatible = "ti,dm814-phy-gmii-sel",
275 .compatible = "ti,am654-phy-gmii-sel",
279 .compatible = "ti,j7200-cpsw5g-phy-gmii-sel",
283 .compatible = "ti,j721e-cpsw9g-phy-gmii-sel",
287 .compatible = "ti,j784s4-cpsw9g-phy-gmii-sel",
519 .name = "phy-gmii-sel",
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| /linux-6.12.1/arch/arm/boot/dts/intel/socfpga/ |
| D | socfpga_vt.dts | 40 phy-mode = "gmii";
76 phy-mode = "gmii";
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| /linux-6.12.1/arch/loongarch/boot/dts/ |
| D | loongson-2k2000-ref.dts | 65 phy-mode = "gmii";
80 phy-mode = "gmii";
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| /linux-6.12.1/arch/arm/boot/dts/gemini/ |
| D | gemini-ns2502.dts | 108 pinctrl-gmii {
110 function = "gmii";
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| D | gemini-ssi1328.dts | 118 pinctrl-gmii {
121 function = "gmii";
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| D | gemini-wbd222.dts | 114 pinctrl-gmii {
117 function = "gmii";
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| D | gemini-nas4220b.dts | 103 pinctrl-gmii {
105 function = "gmii";
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| /linux-6.12.1/arch/arm/boot/dts/microchip/ |
| D | lan966x-pcb8291.dts | 111 phy-mode = "gmii";
118 phy-mode = "gmii";
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| D | lan966x-pcb8309.dts | 180 phy-mode = "gmii";
187 phy-mode = "gmii";
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| D | lan966x-kontron-kswitch-d10-mmt.dtsi | 157 phy-mode = "gmii";
164 phy-mode = "gmii";
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| /linux-6.12.1/arch/mips/include/asm/octeon/ |
| D | cvmx-helper-rgmii.h | 31 * Functions for RGMII/GMII/MII initialization, configuration,
43 * Returns Number of RGMII/GMII/MII ports (0-4).
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| /linux-6.12.1/arch/riscv/boot/dts/microchip/ |
| D | mpfs-tysom-m.dts | 84 phy-mode = "gmii";
91 phy-mode = "gmii";
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| D | mpfs-m100pfsevp.dts | 91 phy-mode = "gmii";
100 phy-mode = "gmii";
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| /linux-6.12.1/Documentation/devicetree/bindings/soc/fsl/cpm_qe/qe/ |
| D | ucc.txt | 50 i.e., "mii" (default), "rmii", "gmii", "rgmii", "rgmii-id" (Internal
66 phy-connection-type = "gmii";
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| /linux-6.12.1/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac-socfpga.c | 153 "altr,gmii-to-sgmii-converter", 0); in socfpga_dwmac_parse_data()
285 /* Overwrite val to GMII if splitter core is enabled. The phymode here in socfpga_gen5_set_phy_mode()
287 * EMAC core is GMII. in socfpga_gen5_set_phy_mode()
341 /* Overwrite val to GMII if splitter core is enabled. The phymode here in socfpga_gen10_set_phy_mode()
343 * EMAC core is GMII. in socfpga_gen10_set_phy_mode()
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| /linux-6.12.1/arch/mips/cavium-octeon/executive/ |
| D | cvmx-helper-rgmii.c | 29 * Functions for RGMII/GMII/MII initialization, configuration,
50 * Returns Number of RGMII/GMII/MII ports (0-4).
68 * GMII/MII mode. This limits us to 2 ports in __cvmx_helper_rgmii_probe()
411 * 1 1 1 X Port 1: GMII/MII; Port 2: disabled. GMII or in __cvmx_helper_rgmii_link_set()
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