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Searched +full:fpga +full:- +full:ngpixis (Results 1 – 9 of 9) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/board/
Dfsl,fpga-qixis.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/board/fsl,fpga-qixis.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale on-board FPGA/CPLD
10 - Frank Li <Frank.Li@nxp.com>
15 - items:
16 - const: fsl,p1022ds-fpga
17 - const: fsl,fpga-ngpixis
18 - items:
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/linux-6.12.1/arch/powerpc/platforms/85xx/
Dcorenet_generic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Copyright 2009-2011 Freescale Semiconductor Inc.
19 #include <asm/pci-bridge.h>
20 #include <asm/ppc-pci.h>
62 .compatible = "simple-bus"
65 .compatible = "mdio-mux-gpio"
68 .compatible = "fsl,fpga-ngpixis"
71 .compatible = "fsl,fpga-qixis"
77 .compatible = "fsl,p4080-pcie",
80 .compatible = "fsl,qoriq-pcie-v2.2",
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Dp1022_ds.c42 * Board-specific initialization of the DIU. This code should probably be
57 /* Some ngPIXIS register definitions */
77 * Note that we need to byte-swap the value before it's written to the AD
140 * If we only have 32-bit addressing, then the BRx address *is* the in lbc_br_to_phys()
181 guts_node = of_find_compatible_node(NULL, NULL, "fsl,p1022-guts"); in p1022ds_set_monitor_port()
193 lbc_node = of_find_compatible_node(NULL, NULL, "fsl,p1022-elbc"); in p1022ds_set_monitor_port()
205 law_node = of_find_compatible_node(NULL, NULL, "fsl,ecm-law"); in p1022ds_set_monitor_port()
217 iprop = of_get_property(law_node, "fsl,num-laws", NULL); in p1022ds_set_monitor_port()
219 pr_err("p1022ds: LAW node is missing fsl,num-laws property\n"); in p1022ds_set_monitor_port()
234 br0 = in_be32(&lbc->bank[0].br); in p1022ds_set_monitor_port()
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/linux-6.12.1/arch/powerpc/boot/dts/fsl/
Dp1022ds.dtsi2 * P1022 DS Device Tree Source stub (no addresses or top-level ranges)
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
46 label = "ramdisk-nor";
47 read-only;
52 label = "diagnostic-nor";
53 read-only;
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Dp2020ds.dtsi2 * P2020DS Device Tree Source stub (no addresses or top-level ranges)
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
46 read-only;
51 read-only;
56 read-only;
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Dp3041ds.dts4 * Copyright 2010 - 2015 Freescale Semiconductor Inc.
35 /include/ "p3041si-pre.dtsi"
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
62 reserved-memory {
63 #address-cells = <2>;
64 #size-cells = <2>;
67 bman_fbpr: bman-fbpr {
71 qman_fqd: qman-fqd {
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Dp5020ds.dts4 * Copyright 2010 - 2015 Freescale Semiconductor Inc.
35 /include/ "p5020si-pre.dtsi"
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
62 reserved-memory {
63 #address-cells = <2>;
64 #size-cells = <2>;
67 bman_fbpr: bman-fbpr {
71 qman_fqd: qman-fqd {
[all …]
Dp4080ds.dts4 * Copyright 2009 - 2015 Freescale Semiconductor Inc.
35 /include/ "p4080si-pre.dtsi"
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
62 reserved-memory {
63 #address-cells = <2>;
64 #size-cells = <2>;
67 bman_fbpr: bman-fbpr {
71 qman_fqd: qman-fqd {
[all …]
Dp5040ds.dts4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
35 /include/ "p5040si-pre.dtsi"
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
74 reserved-memory {
75 #address-cells = <2>;
76 #size-cells = <2>;
79 bman_fbpr: bman-fbpr {
83 qman_fqd: qman-fqd {
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