Searched +full:four +full:- +full:channel (Results 1 – 25 of 388) sorted by relevance
12345678910>>...16
| /linux-6.12.1/sound/core/ |
| D | pcm_iec958.c | 1 // SPDX-License-Identifier: GPL-2.0-only
13 * snd_pcm_create_iec958_consumer_default - create default consumer format IEC958 channel status
14 * @cs: channel status buffer, at least four bytes
15 * @len: length of channel status buffer
17 * Create the consumer format channel status data in @cs of maximum size
18 * @len. When relevant, the configuration-dependant bits will be set as
32 return -EINVAL; in snd_pcm_create_iec958_consumer_default()
52 return -EINVAL; in fill_iec958_consumer()
80 return -EINVAL; in fill_iec958_consumer()
103 case 32: /* Assume 24-bit width for 32-bit samples. */ in fill_iec958_consumer()
[all …]
|
| /linux-6.12.1/Documentation/filesystems/spufs/ |
| D | spufs.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 spufs - the SPU file system
26 logical SPU. Users can change permissions on those files, but not actu-
43 The files in spufs mostly follow the standard behavior for regular sys-
55 All files support the chmod(2)/fchmod(2) and chown(2)/fchown(2) opera-
81 The first SPU to CPU communication mailbox. This file is read-only and
82 can be read in units of 32 bits. The file can only be used in non-
87 If a count smaller than four is requested, read returns -1 and
89 box, the return value is set to -1 and errno becomes EAGAIN.
90 When data has been read successfully, four bytes are placed in
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/display/imx/ |
| D | ldb.txt | 1 Device-Tree bindings for LVDS Display Bridge (ldb)
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
14 multiplexer in the front to select any of the four IPU display
15 interfaces as input for each LVDS channel.
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
19 - clocks, clock-names : phandles to the LDB divider and selector clocks and to
[all …]
|
| /linux-6.12.1/Documentation/core-api/ |
| D | dma-isa-lpc.rst | 12 ------------------------
16 #include <linux/dma-mapping.h>
20 bus addresses (see Documentation/core-api/dma-api.rst for details).
28 -----------------
37 The DMA-able address space is the lowest 16 MB of _physical_ memory.
39 or 128 KiB depending on which channel you use).
45 allocate the memory during boot-up it's a good idea to also pass
52 -------------------
66 --------
68 A normal ISA DMA controller has 8 channels. The lower four are for
[all …]
|
| /linux-6.12.1/Documentation/scsi/ |
| D | advansys.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 RISC-based, Bus-Mastering, Fast (10 Mhz) and Ultra (20 Mhz) Narrow
9 (8-bit transfer) SCSI Host Adapters for the ISA, EISA, VL, and PCI
10 buses and RISC-based, Bus-Mastering, Ultra (20 Mhz) Wide (16-bit
21 - ABP-480 - Bus-Master CardBus (16 CDB)
24 - ABP510/5150 - Bus-Master ISA (240 CDB)
25 - ABP5140 - Bus-Master ISA PnP (16 CDB)
26 - ABP5142 - Bus-Master ISA PnP with floppy (16 CDB)
27 - ABP902/3902 - Bus-Master PCI (16 CDB)
28 - ABP3905 - Bus-Master PCI (16 CDB)
[all …]
|
| /linux-6.12.1/Documentation/admin-guide/perf/ |
| D | alibaba_pmu.rst | 2 Alibaba's T-Head SoC Uncore Performance Monitoring Unit (PMU)
5 The Yitian 710, custom-built by Alibaba Group's chip development business,
6 T-Head, implements uncore PMU for performance and functional debugging to
9 DDR Sub-System Driveway (DRW) PMU Driver
12 Yitian 710 employs eight DDR5/4 channels, four on each die. Each DDR5 channel
14 channel is split into two independent sub-channels. The DDR Sub-System Driveway
15 implements separate PMUs for each sub-channel to monitor various performance
20 sub-channels of the same channel in die 0. And the PMU device of die 1 is
23 Each sub-channel has 36 PMU counters in total, which is classified into
24 four groups:
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/media/ |
| D | imx.txt | 5 ---------------------------
12 - compatible : "fsl,imx-capture-subsystem";
13 - ports : Should contain a list of phandles pointing to camera
18 capture-subsystem {
19 compatible = "fsl,imx-capture-subsystem";
25 --------------
27 This is the device node for the MIPI CSI-2 Receiver core in the i.MX
28 SoC. This is a Synopsys Designware MIPI CSI-2 host controller core
29 combined with a D-PHY core mixed into the same register block. In
30 addition this device consists of an i.MX-specific "CSI2IPU gasket"
[all …]
|
| /linux-6.12.1/Documentation/hwmon/ |
| D | pcf8591.rst | 17 - Aurelien Jarno <aurelien@aurel32.net>
18 - valuable contributions by Jan M. Sendler <sendler@sendler.de>,
19 - Jean Delvare <jdelvare@suse.de>
23 -----------
25 The PCF8591 is an 8-bit A/D and D/A converter (4 analog inputs and one
29 The PCF8591 has 4 analog inputs programmable as single-ended or
32 - mode 0 : four single ended inputs
35 - mode 1 : three differential inputs
39 - mode 2 : single ended and differential mixed
41 Pins AIN2 is the positive differential input for channel 3
[all …]
|
| D | lm93.rst | 10 Addresses scanned: I2C 0x2c-0x2e
18 Addresses scanned: I2C 0x2c-0x2e
24 - Mark M. Hoffman <mhoffman@lightlink.com>
25 - Ported to 2.6 by Eric J. Bowersox <ericb@aspsys.com>
26 - Adapted to 2.6.20 by Carsten Emde <ce@osadl.org>
27 - Modified for mainline integration by Hans J. Koch <hjk@hansjkoch.de>
30 -----------------
33 Set to non-zero to force some initializations (default is 0).
38 Configures in7 and in8 limit type, where 0 means absolute and non-zero
54 --------------------
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/iio/adc/ |
| D | maxim,max34408.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ivan Mikhaylov <fr0st61te@gmail.com>
13 The MAX34408/MAX34409 are two- and four-channel current monitors that are
15 unidirectional current sensor offers precision high-side operation with a
16 low full-scale sense voltage. The devices automatically sequence through
17 two or four channels and collect the current-sense samples and average them
19 user-programmable digital thresholds to indicate overcurrent conditions.
24 https://www.analog.com/media/en/technical-documentation/data-sheets/MAX34408-MAX34409.pdf
[all …]
|
| D | renesas,rcar-gyroadc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/renesas,rcar-gyroadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car GyroADC
10 - Marek Vasut <marek.vasut+renesas@gmail.com>
15 are sampled by the GyroADC block in a round-robin fashion and the result
23 - enum:
24 - renesas,r8a7791-gyroadc
25 - renesas,r8a7792-gyroadc
[all …]
|
| D | microchip,mcp3564.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marius Cristea <marius.cristea@microchip.com>
13 Bindings for the Microchip family of 153.6 ksps, Low-Noise 16/24-Bit
14 Delta-Sigma ADCs with an SPI interface. Datasheet can be found here:
16 …s/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP3561-2-4-Family-Data-Sheet-DS20006181…
18 …ds/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3561_2_4R-Data-Sheet-DS200006391C.pdf
20 …ProductDocuments/DataSheets/MCP3461-2-4-Two-Four-Eight-Channel-153.6-ksps-Low-Noise-16-Bit-Delta-S…
22 …/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3461-2-4R-Family-Data-Sheet-DS20006404…
[all …]
|
| /linux-6.12.1/drivers/hwmon/ |
| D | pcf8591.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2001-2004 Aurelien Jarno <aurelien@aurel32.net>
25 " 0 = four single ended inputs\n"
41 * 0x00 = four single ended inputs
52 * Channel selection
53 * 0x00 = channel 0
54 * 0x01 = channel 1
55 * 0x02 = channel 2
56 * 0x03 = channel 3
65 #define REG_TO_SIGNED(reg) (((reg) & 0x80) ? ((reg) - 256) : (reg))
[all …]
|
| /linux-6.12.1/Documentation/admin-guide/media/ |
| D | imx.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
20 - Video De-Interlacing or Combining Block (VDIC)
26 re-ordering (for example UYVY to YUYV) within the same colorspace, and
27 packed <--> planar conversion. The IDMAC can also perform a simple
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/iio/addac/ |
| D | adi,ad74413r.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cosmin Tanislav <cosmin.tanislav@analog.com>
13 The AD74412R and AD74413R are quad-channel software configurable input/output
18 The devices feature a 16-bit ADC and four configurable 13-bit DACs to provide
19 four configurable input/output channels and a suite of diagnostic functions.
20 The AD74413R differentiates itself from the AD74412R by being HART-compatible.
27 - adi,ad74412r
28 - adi,ad74413r
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/dma/stm32/ |
| D | st,stm32-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 DMA is a general-purpose direct memory access controller capable of
11 supporting 8 independent DMA channels. Each channel can have up to 8 requests.
13 described in the dma.txt file, using a four-cell specifier for each
14 channel: a phandle to the DMA controller plus the following four integer cells:
15 1. The channel id
17 3. A 32bit mask specifying the DMA channel configuration which are device
[all …]
|
| /linux-6.12.1/Documentation/sound/cards/ |
| D | cmipci.rst | 2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
13 DACs, both streams are handled independently unlike the 4/6ch multi-
14 channel playbacks in the section below.
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
30 The rear output can be heard only when "Four Channel Mode" switch is
35 When "Four Channel Mode" switch is off, the output from rear speakers
43 front one) and was so excited. It was even with "Four Channel" bit
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/leds/ |
| D | leds-lm36274.txt | 1 * Texas Instruments LM36274 4-Channel LCD Backlight Driver w/Integrated Bias
3 The LM36274 is an integrated four-channel WLED driver and LCD bias supply.
4 The backlight boost provides the power to bias four parallel LED strings with
5 up to 29V total output voltage. The 11-bit LED current is programmable via
9 Documentation/devicetree/bindings/mfd/ti-lmu.txt
12 Documentation/devicetree/bindings/regulator/lm363x-regulator.txt
15 - compatible:
16 "ti,lm36274-backlight"
17 - reg : 0
18 - #address-cells : 1
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/leds/backlight/ |
| D | richtek,rt4831-backlight.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/richtek,rt4831-backlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
16 For the LCD backlight, it can provide four channel WLED driving capability.
17 Each channel driving current is up to 30mA
20 https://www.richtek.com/assets/product_file/RT4831A/DS4831A-05.pdf
23 - $ref: common.yaml#
27 const: richtek,rt4831-backlight
[all …]
|
| /linux-6.12.1/Documentation/driver-api/ |
| D | edac.rst | 5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
35 * Channel
37 A memory controller channel, responsible to communicate with a group of
38 DIMMs. Each channel has its own independent control (command) and data
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
57 memories. FB-DIMM and RAMBUS use a different concept for channel, so
60 * Double-channel
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/phy/ |
| D | fsl,imx8qm-lvds-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,imx8qm-lvds-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
14 It converts two groups of four 7/10 bits of CMOS data into two
15 groups of four data lanes of LVDS data streams. A phase-locked
30 - fsl,imx8qm-lvds-phy
31 - mixel,28fdsoi-lvds-1250-8ch-tx-pll
33 "#phy-cells":
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/display/ |
| D | dsi-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dsi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
24 can control one to four virtual channels to one panel. Each virtual
25 channel should have a node "panel" for their virtual channel with their
26 reg-property set to the virtual channel number, usually there is just
27 one virtual channel, number 0.
33 clock-master:
[all …]
|
| /linux-6.12.1/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/ |
| D | input_formatter_local.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (c) 2010-2015, Intel Corporation.
42 * single channel ID + channel format type. Conversely
44 * from multiple channel & format type combinations
46 * LUT[0,1] channel=0, format type {0,1,...31}
47 * LUT[2,3] channel=1, format type {0,1,...31}
48 * LUT[4,5] channel=2, format type {0,1,...31}
49 * LUT[6,7] channel=3, format type {0,1,...31}
51 * Each register hold 16 2-bit fields encoding the sink
54 * The single FSYNCH register uses four 3-bit fields of 1-hot
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/iio/potentiometer/ |
| D | renesas,x9250.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
13 The Renesas X9250 integrates four digitally controlled potentiometers.
18 - $ref: /schemas/spi/spi-peripheral-props.yaml
23 - renesas,x9250t
24 - renesas,x9250u
29 vcc-supply:
33 avp-supply:
[all …]
|
| /linux-6.12.1/drivers/leds/rgb/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
6 tristate "LEDs group multi-color support"
11 different colors are physically grouped in a single multi-color LED
12 and driven by a controller that doesn't have multi-color support.
15 will be called leds-group-multicolor.
24 It is a 3 or 4 channel LED driver programmed via an I2C interface.
27 will be called leds-ktd202x.
38 will be called leds-ncp5623.
41 tristate "PWM driven multi-color LED Support"
48 will be called leds-pwm-multicolor.
[all …]
|
12345678910>>...16