| /linux-6.12.1/lib/ |
| D | kfifo.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * A generic kernel FIFO implementation
8 #include <linux/dma-mapping.h>
18 * internal helper to calculate the unused elements in a fifo
20 static inline unsigned int kfifo_unused(struct __kfifo *fifo) in kfifo_unused() argument
22 return (fifo->mask + 1) - (fifo->in - fifo->out); in kfifo_unused()
25 int __kfifo_alloc(struct __kfifo *fifo, unsigned int size, in __kfifo_alloc() argument
32 size = roundup_pow_of_two(size); in __kfifo_alloc()
34 fifo->in = 0; in __kfifo_alloc()
35 fifo->out = 0; in __kfifo_alloc()
[all …]
|
| /linux-6.12.1/fs/bcachefs/ |
| D | fifo.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
7 #define FIFO(type) \ macro
9 size_t front, back, size, mask; \
13 #define DECLARE_FIFO(type, name) FIFO(type) name
15 #define fifo_buf_size(fifo) \ argument
16 ((fifo)->size \
17 ? roundup_pow_of_two((fifo)->size) * sizeof((fifo)->data[0]) \
20 #define init_fifo(fifo, _size, _gfp) \ argument
22 (fifo)->front = (fifo)->back = 0; \
23 (fifo)->size = (_size); \
[all …]
|
| /linux-6.12.1/include/linux/ |
| D | kfifo.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * A generic kernel FIFO implementation
12 * How to porting drivers to the new generic FIFO API:
14 * - Modify the declaration of the "struct kfifo *" object into a
15 * in-place "struct kfifo" object
16 * - Init the in-place object with kfifo_alloc() or kfifo_init()
17 * Note: The address of the in-place "struct kfifo" object must be
19 * - Replace the use of __kfifo_put into kfifo_in and __kfifo_get
21 * - Replace the use of kfifo_put into kfifo_in_spinlocked and kfifo_get
26 * - The formerly __kfifo_* functions are renamed into kfifo_*
[all …]
|
| D | pxa2xx_ssp.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * This driver supports the following PXA CPU/SSP ports:-
49 #define SSCR0_DSS GENMASK(3, 0) /* Data Size Select (mask) */
50 #define SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..16] */
60 #define SSCR0_EDSS BIT(20) /* Extended data size select */
62 #define SSCR0_RIM BIT(22) /* Receive FIFO overrun interrupt mask */
63 #define SSCR0_TUM BIT(23) /* Transmit FIFO underrun interrupt mask */
65 #define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */
66 #define SSCR0_FPCKE BIT(29) /* FIFO packing enable */
70 #define SSCR1_RIE BIT(0) /* Receive FIFO Interrupt Enable */
[all …]
|
| /linux-6.12.1/drivers/platform/mellanox/ |
| D | mlxbf-tmfifo.c | 1 // SPDX-License-Identifier: GPL-2.0+
24 #include "mlxbf-tmfifo-regs.h"
26 /* Vring size. */
29 /* Console Tx buffer size. */
35 /* House-keeping timer interval. */
38 /* Virtual devices sharing the TM FIFO. */
53 /* ACPI UID for BlueField-3. */
59 * struct mlxbf_tmfifo_vring - Structure of the TmFifo virtual ring
71 * @num: vring size (number of descriptors)
72 * @align: vring alignment size
[all …]
|
| /linux-6.12.1/drivers/md/bcache/ |
| D | util.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
37 (heap)->nr = 0; \
38 (heap)->size = (_size); \
39 _bytes = (heap)->size * sizeof(*(heap)->data); \
40 (heap)->data = kvmalloc(_bytes, (gfp) & GFP_KERNEL); \
41 (heap)->data; \
46 kvfree((heap)->data); \
47 (heap)->data = NULL; \
52 size_t front, back, size, mask; \
56 #define fifo_for_each(c, fifo, iter) \ argument
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/powerpc/fsl/ |
| D | mpc5121-psc.txt | 4 ----------------
7 are specified by fsl,mpc5121-psc-uart nodes in the
8 fsl,mpc5121-immr SoC node. Additionally the PSC FIFO
9 Controller node fsl,mpc5121-psc-fifo is required there:
11 fsl,mpc512x-psc-uart nodes
12 --------------------------
15 - compatible : Should contain "fsl,<soc>-psc-uart" and "fsl,<soc>-psc"
17 - reg : Offset and length of the register set for the PSC device
18 - interrupts : <a b> where a is the interrupt number of the
19 PSC FIFO Controller and b is a field that represents an
[all …]
|
| /linux-6.12.1/sound/soc/meson/ |
| D | aiu-fifo.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/dma-mapping.h>
11 #include <sound/soc-dai.h>
13 #include "aiu-fifo.h"
37 struct aiu_fifo *fifo = snd_soc_dai_dma_data_get_playback(dai); in aiu_fifo_pointer() local
38 struct snd_pcm_runtime *runtime = substream->runtime; in aiu_fifo_pointer()
41 addr = snd_soc_component_read(component, fifo->mem_offset + AIU_MEM_RD); in aiu_fifo_pointer()
43 return bytes_to_frames(runtime, addr - (unsigned int)runtime->dma_addr); in aiu_fifo_pointer()
48 struct snd_soc_component *component = dai->component; in aiu_fifo_enable()
49 struct aiu_fifo *fifo = snd_soc_dai_dma_data_get_playback(dai); in aiu_fifo_enable() local
[all …]
|
| D | axg-fifo.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
15 #include <sound/soc-dai.h>
17 #include "axg-fifo.h"
21 * capture frontend DAI. The logic behind this two types of fifo is very
65 return dai->dev; in axg_fifo_dev()
68 static void __dma_enable(struct axg_fifo *fifo, bool enable) in __dma_enable() argument
70 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_DMA_EN, in __dma_enable()
77 struct axg_fifo *fifo = axg_fifo_data(ss); in axg_fifo_pcm_trigger() local
83 __dma_enable(fifo, true); in axg_fifo_pcm_trigger()
88 __dma_enable(fifo, false); in axg_fifo_pcm_trigger()
[all …]
|
| /linux-6.12.1/drivers/net/ethernet/intel/fm10k/ |
| D | fm10k_mbx.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
7 * fm10k_fifo_init - Initialize a message FIFO
8 * @fifo: pointer to FIFO
9 * @buffer: pointer to memory to be used to store FIFO
10 * @size: maximum message size to store in FIFO, must be 2^n - 1
12 static void fm10k_fifo_init(struct fm10k_mbx_fifo *fifo, u32 *buffer, u16 size) in fm10k_fifo_init() argument
14 fifo->buffer = buffer; in fm10k_fifo_init()
15 fifo->size = size; in fm10k_fifo_init()
16 fifo->head = 0; in fm10k_fifo_init()
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/net/ |
| D | ibm,emac.txt | 8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
[all …]
|
| /linux-6.12.1/arch/powerpc/boot/dts/ |
| D | mpc5121.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2008 Freescale Semiconductor Inc.
8 #include <dt-bindings/clock/mpc512x-clock.h>
10 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
17 interrupt-parent = <&ipic>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <0x20>; /* 32 bytes */
[all …]
|
| D | eiger.dts | 11 /dts-v1/;
14 #address-cells = <2>;
15 #size-cells = <1>;
18 dcr-parent = <&{/cpus/cpu@0}>;
30 #address-cells = <1>;
31 #size-cells = <0>;
37 clock-frequency = <0>; /* Filled in by U-Boot */
38 timebase-frequency = <0>; /* Filled in by U-Boot */
39 i-cache-line-size = <32>;
40 d-cache-line-size = <32>;
[all …]
|
| /linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/engine/fifo/ |
| D | r535.c | 51 return (chan->cgrp->runl->id << 16) | chan->id; in r535_chan_doorbell_handle()
67 struct nvkm_fifo *fifo = chan->cgrp->runl->fifo; in r535_chan_ramfc_clear() local
69 nvkm_gsp_rm_free(&chan->rm.object); in r535_chan_ramfc_clear()
71 dma_free_coherent(fifo->engine.subdev.device->dev, fifo->rm.mthdbuf_size, in r535_chan_ramfc_clear()
72 chan->rm.mthdbuf.ptr, chan->rm.mthdbuf.addr); in r535_chan_ramfc_clear()
74 nvkm_cgrp_vctx_put(chan->cgrp, &chan->rm.grctx); in r535_chan_ramfc_clear()
82 struct nvkm_fifo *fifo = chan->cgrp->runl->fifo; in r535_chan_ramfc_write() local
84 struct nvkm_device *device = fifo->engine.subdev.device; in r535_chan_ramfc_write()
86 const int userd_p = chan->id / CHID_PER_USERD; in r535_chan_ramfc_write()
87 const int userd_i = chan->id % CHID_PER_USERD; in r535_chan_ramfc_write()
[all …]
|
| D | nv50.c | 38 nvkm_ramht_remove(chan->ramht, hash); in nv50_eobj_ramht_del()
44 return nvkm_ramht_insert(chan->ramht, eobj, 0, 4, eobj->handle, engn->id << 20); in nv50_eobj_ramht_add()
50 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in nv50_chan_stop()
52 nvkm_mask(device, 0x002600 + (chan->id * 4), 0x80000000, 0x00000000); in nv50_chan_stop()
58 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in nv50_chan_start()
60 nvkm_mask(device, 0x002600 + (chan->id * 4), 0x80000000, 0x80000000); in nv50_chan_start()
66 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in nv50_chan_unbind()
68 nvkm_wr32(device, 0x002600 + (chan->id * 4), 0x00000000); in nv50_chan_unbind()
74 struct nvkm_device *device = chan->cgrp->runl->fifo->engine.subdev.device; in nv50_chan_bind()
76 nvkm_wr32(device, 0x002600 + (chan->id * 4), chan->ramfc->addr >> 12); in nv50_chan_bind()
[all …]
|
| /linux-6.12.1/drivers/net/wireless/realtek/rtw88/ |
| D | mac.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
94 return -ETIMEDOUT; in rtw_mac_pre_system_cfg()
107 return -EINVAL; in rtw_mac_pre_system_cfg()
156 if (cmd->base == RTW_PWR_ADDR_SDIO) in rtw_pwr_cmd_polling()
157 offset = cmd->offset | SDIO_LOCAL_OFFSET; in rtw_pwr_cmd_polling()
159 offset = cmd->offset; in rtw_pwr_cmd_polling()
161 if (do_pwr_poll_cmd(rtwdev, offset, cmd->mask, cmd->value)) in rtw_pwr_cmd_polling()
169 if (rtwdev->chip->id == RTW_CHIP_TYPE_8723D) in rtw_pwr_cmd_polling()
173 if (rtwdev->chip->id == RTW_CHIP_TYPE_8723D) in rtw_pwr_cmd_polling()
[all …]
|
| /linux-6.12.1/Documentation/devicetree/bindings/spi/ |
| D | spi-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
20 pattern: "^spi(@.*|-([0-9]|[1-9][0-9]+))?$"
22 "#address-cells":
25 "#size-cells":
28 cs-gpios:
32 increased automatically with max(cs-gpios, hardware chip selects).
[all …]
|
| /linux-6.12.1/samples/kfifo/ |
| D | dma-example.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Sample fifo dma implementation
14 * This module shows how to handle fifo dma operations.
17 /* fifo size in elements (bytes) */
20 static struct kfifo fifo; variable
29 printk(KERN_INFO "DMA fifo test start\n"); in example_init()
31 if (kfifo_alloc(&fifo, FIFO_SIZE, GFP_KERNEL)) { in example_init()
33 return -ENOMEM; in example_init()
36 printk(KERN_INFO "queue size: %u\n", kfifo_size(&fifo)); in example_init()
38 kfifo_in(&fifo, "test", 4); in example_init()
[all …]
|
| /linux-6.12.1/drivers/gpu/drm/msm/ |
| D | msm_rd.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 * tail -f /sys/kernel/debug/dri/<minor>/rd > logfile.rd
18 * tail -f /sys/kernel/debug/dri/<minor>/hangrd > logfile.rd
26 * The module-param "rd_full", which defaults to false, enables snapshotting
27 * all (non-written) buffers in the submit, rather than just cmdstream bo's.
54 RD_GPUADDR, /* u32 gpuaddr, u32 size */
72 (CIRC_CNT((circ)->head, (circ)->tail, BUF_SZ))
74 (CIRC_CNT_TO_END((circ)->head, (circ)->tail, BUF_SZ))
77 (CIRC_SPACE((circ)->head, (circ)->tail, BUF_SZ))
79 (CIRC_SPACE_TO_END((circ)->head, (circ)->tail, BUF_SZ))
[all …]
|
| /linux-6.12.1/drivers/iio/imu/inv_icm42600/ |
| D | inv_icm42600_buffer.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
20 /* FIFO header: 1 byte */
52 /* FIFO empty */ in inv_icm42600_fifo_decode_packet()
72 *accel = &pack2->accel; in inv_icm42600_fifo_decode_packet()
73 *gyro = &pack2->gyro; in inv_icm42600_fifo_decode_packet()
74 *temp = &pack2->temp; in inv_icm42600_fifo_decode_packet()
75 *timestamp = &pack2->timestamp; in inv_icm42600_fifo_decode_packet()
81 *accel = &pack1->data; in inv_icm42600_fifo_decode_packet()
83 *temp = &pack1->temp; in inv_icm42600_fifo_decode_packet()
91 *gyro = &pack1->data; in inv_icm42600_fifo_decode_packet()
[all …]
|
| /linux-6.12.1/drivers/char/xilinx_hwicap/ |
| D | fifo_icap.c | 24 * (c) Copyright 2007-2008 Xilinx Inc.
39 #define XHI_WF_OFFSET 0x100 /* Write FIFO */
40 #define XHI_RF_OFFSET 0x104 /* Read FIFO */
41 #define XHI_SZ_OFFSET 0x108 /* Size Register */
44 #define XHI_WFV_OFFSET 0x114 /* Write FIFO Vacancy Register */
45 #define XHI_RFO_OFFSET 0x118 /* Read FIFO Occupancy Register */
66 #define XHI_IPIXR_RFULL_MASK 0x00000008 /* Read FIFO Full */
67 #define XHI_IPIXR_WEMPTY_MASK 0x00000004 /* Write FIFO Empty */
68 #define XHI_IPIXR_RDP_MASK 0x00000002 /* Read FIFO half full */
69 #define XHI_IPIXR_WRP_MASK 0x00000001 /* Write FIFO half full */
[all …]
|
| /linux-6.12.1/drivers/net/ethernet/google/gve/ |
| D | gve_tx.c | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright (C) 2015-2021 Google, Inc.
20 iowrite32be(val, &priv->db_bar2[be32_to_cpu(q_resources->db_index)]); in gve_tx_put_doorbell()
26 struct gve_tx_ring *tx = &priv->tx[tx_qid]; in gve_xdp_tx_flush()
28 gve_tx_put_doorbell(priv, tx->q_resources, tx->req); in gve_xdp_tx_flush()
35 * gve_tx_fifo_* manages the Registered Segment as a FIFO - clients must
39 static int gve_tx_fifo_init(struct gve_priv *priv, struct gve_tx_fifo *fifo) in gve_tx_fifo_init() argument
41 fifo->base = vmap(fifo->qpl->pages, fifo->qpl->num_entries, VM_MAP, in gve_tx_fifo_init()
43 if (unlikely(!fifo->base)) { in gve_tx_fifo_init()
44 netif_err(priv, drv, priv->dev, "Failed to vmap fifo, qpl_id = %d\n", in gve_tx_fifo_init()
[all …]
|
| /linux-6.12.1/arch/arm/boot/dts/microchip/ |
| D | sam9x60.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sam9x60.dtsi - Device Tree Include file for Microchip SAM9X60 SoC
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/clock/at91.h>
15 #include <dt-bindings/mfd/at91-usart.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
19 #address-cells = <1>;
[all …]
|
| /linux-6.12.1/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
| D | ampdu.c | 31 /* max Tx ba window size (in pdu) */
33 /* default Tx ba window size (in pdu) */
35 /* default Rx ba window size (in pdu) */
37 /* max Rx ba window size (in pdu) */
52 #define NUM_FFPLD_FIFO 4 /* number of fifo concerned by pre-loading */
56 #define FFPLD_MPDU_SIZE 1800 /* estimate of maximum mpdu size */
76 #define MODADD_POW2(x, y, bound) (((x) + (y)) & ((bound) - 1))
77 #define MODSUB_POW2(x, y, bound) (((x) - (y)) & ((bound) - 1))
79 /* structure to hold tx fifo information and pre-loading state
85 * ampdu_pld_size: number of bytes to be pre-loaded
[all …]
|
| /linux-6.12.1/tools/testing/selftests/tc-testing/tc-tests/qdiscs/ |
| D | fifo.json | 7 "fifo"
17 "matchPattern": "qdisc bfifo 1: root.*limit [0-9]+b",
28 "fifo"
38 "matchPattern": "qdisc pfifo 1: root.*limit [0-9]+p",
49 "fifo"
59 "matchPattern": "qdisc bfifo ffff: root.*limit [0-9]+b",
67 "name": "Add bfifo qdisc on egress with queue size of 3000 bytes",
70 "fifo"
88 "name": "Add pfifo qdisc on egress with queue size of 3000 packets",
91 "fifo"
[all …]
|