Searched full:fhctl (Results 1 – 12 of 12) sorted by relevance
| /linux-6.12.1/Documentation/devicetree/bindings/clock/ |
| D | mediatek,mt8186-fhctl.yaml | 4 $id: http://devicetree.org/schemas/clock/mediatek,mt8186-fhctl.yaml#
13 Frequency hopping control (FHCTL) is a piece of hardware that control
20 - mediatek,mt6795-fhctl
21 - mediatek,mt8173-fhctl
22 - mediatek,mt8186-fhctl
23 - mediatek,mt8192-fhctl
24 - mediatek,mt8195-fhctl
30 description: Phandles of the PLL with FHCTL hardware capability.
53 fhctl: fhctl@1000ce00 {
54 compatible = "mediatek,mt8186-fhctl";
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| /linux-6.12.1/drivers/clk/mediatek/ |
| D | clk-mt8186-apmixedsys.c | 10 #include "clk-fhctl.h"
145 const u8 *fhctl_node = "mediatek,mt8186-fhctl"; in clk_mt8186_apmixed_probe()
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| D | clk-mt6795-apmixedsys.c | 10 #include "clk-fhctl.h"
141 const u8 *fhctl_node = "mediatek,mt6795-fhctl"; in clk_mt6795_apmixed_probe()
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| D | clk-mt8192-apmixedsys.c | 12 #include "clk-fhctl.h"
156 const u8 *fhctl_node = "mediatek,mt8192-fhctl"; in clk_mt8192_apmixed_probe()
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| D | clk-mt8173-apmixedsys.c | 12 #include "clk-fhctl.h"
142 const u8 *fhctl_node = "mediatek,mt8173-fhctl"; in clk_mt8173_apmixed_probe()
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| D | clk-fhctl.c | 12 #include "clk-fhctl.h"
144 pr_warn("%s: FHCTL hopping timeout\n", pll->data->name); in hopping_hw_flow()
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| D | clk-mt8195-apmixedsys.c | 6 #include "clk-fhctl.h"
175 const u8 *fhctl_node = "mediatek,mt8195-fhctl"; in clk_mt8195_apmixed_probe()
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| D | clk-pllfh.c | 16 #include "clk-fhctl.h"
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| D | Makefile | 3 obj-$(CONFIG_COMMON_CLK_MEDIATEK_FHCTL) += clk-fhctl.o clk-pllfh.o
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| D | Kconfig | 15 bool "clock driver for MediaTek FHCTL hardware control"
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| /linux-6.12.1/arch/arm64/boot/dts/mediatek/ |
| D | mt6795-sony-xperia-m5.dts | 130 &fhctl {
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| D | mt6795.dtsi | 441 fhctl: clock-controller@10209f00 { label
442 compatible = "mediatek,mt6795-fhctl";
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