Home
last modified time | relevance | path

Searched +full:eye +full:- +full:diagram +full:- +full:param (Results 1 – 8 of 8) sorted by relevance

/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dhisilicon,hi3660-usb3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/hisilicon,hi3660-usb3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
16 const: hisilicon,hi3660-usb-phy
18 "#phy-cells":
21 hisilicon,pericrg-syscon:
25 hisilicon,pctrl-syscon:
29 hisilicon,eye-diagram-param:
[all …]
Dhisilicon,hi3670-usb3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/phy/hisilicon,hi3670-usb3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
17 const: hisilicon,hi3670-usb-phy
19 "#phy-cells":
22 hisilicon,pericrg-syscon:
26 hisilicon,pctrl-syscon:
30 hisilicon,sctrl-syscon:
[all …]
Dhisilicon,phy-hi3670-pcie.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/hisilicon,phy-hi3670-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
17 const: hisilicon,hi970-pcie-phy
19 "#phy-cells":
26 phy-supply:
31 - description: PCIe PHY clock
32 - description: PCIe AUX clock
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/soc/hisilicon/
Dhisilicon,hi3660-usb3-otg-bc.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/soc/hisilicon/hisilicon,hi3660-usb3-otg-bc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
15 - const: hisilicon,hi3660-usb3-otg-bc
16 - const: syscon
17 - const: simple-mfd
22 usb-phy:
23 $ref: /schemas/phy/hisilicon,hi3660-usb3.yaml
[all …]
/linux-6.12.1/drivers/phy/hisilicon/
Dphy-hi3660-usb3.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017-2018 Hilisicon Electronics Co., Ltd.
73 ret = regmap_write(priv->peri_crg, PERI_CRG_ISODIS, USB_REFCLK_ISO_EN); in hi3660_phy_init()
79 ret = regmap_write(priv->pctrl, PCTRL_PERI_CTRL3, val); in hi3660_phy_init()
85 ret = regmap_write(priv->peri_crg, PERI_CRG_RSTEN4, val); in hi3660_phy_init()
92 ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL0, mask, val); in hi3660_phy_init()
98 ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL7, mask, val); in hi3660_phy_init()
104 ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL2, mask, 0); in hi3660_phy_init()
113 ret = regmap_write(priv->peri_crg, PERI_CRG_RSTDIS4, val); in hi3660_phy_init()
123 ret = regmap_update_bits(priv->otg_bc, USBOTG3_CTRL3, mask, val); in hi3660_phy_init()
[all …]
Dphy-hi3670-usb3.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2017-2020 Hilisicon Electronics Co., Ltd.
190 while (retry-- > 0) { in hi3670_phy_cr_wait_ack()
204 return -ETIMEDOUT; in hi3670_phy_cr_wait_ack()
294 ret = regmap_write(priv->usb31misc, USB3OTG_CTRL4, in hi3670_phy_set_params()
295 priv->eye_diagram_param); in hi3670_phy_set_params()
297 dev_err(priv->dev, "set USB3OTG_CTRL4 failed\n"); in hi3670_phy_set_params()
301 while (retry-- > 0) { in hi3670_phy_set_params()
302 ret = hi3670_phy_cr_read(priv->usb31misc, in hi3670_phy_set_params()
307 if (ret != -ETIMEDOUT) { in hi3670_phy_set_params()
[all …]
Dphy-hi3670-pcie.c1 // SPDX-License-Identifier: GPL-2.0
171 writel(val, phy->base + APB_PHY_START_ADDR + reg); in hi3670_apb_phy_writel()
176 return readl(phy->base + APB_PHY_START_ADDR + reg); in hi3670_apb_phy_readl()
193 writel(val, phy->base + reg); in kirin_apb_natural_phy_writel()
199 return readl(phy->base + reg); in kirin_apb_natural_phy_readl()
206 regmap_read(phy->sysctrl, SCTRL_PCIE_OE_OFFSET, &val); in hi3670_pcie_phy_oe_enable()
212 regmap_write(phy->sysctrl, SCTRL_PCIE_OE_OFFSET, val); in hi3670_pcie_phy_oe_enable()
217 struct device *dev = phy->dev; in hi3670_pcie_get_eyeparam()
221 np = dev->of_node; in hi3670_pcie_get_eyeparam()
223 ret = of_property_read_u32_array(np, "hisilicon,eye-diagram-param", in hi3670_pcie_get_eyeparam()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/hisilicon/
Dhi3660.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/hi3660-clock.h>
10 #include <dt-bindings/thermal/thermal.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
24 #address-cells = <2>;
25 #size-cells = <0>;
[all …]