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/linux-6.12.1/arch/arm64/boot/dts/exynos/
Dexynos7885.dtsi3 * Samsung Exynos7885 SoC device tree source
9 #include <dt-bindings/clock/exynos7885.h>
13 compatible = "samsung,exynos7885";
175 compatible = "samsung,exynos7885-chipid",
194 compatible = "samsung,exynos7885-cmu-peri";
221 compatible = "samsung,exynos7885-cmu-core";
236 compatible = "samsung,exynos7885-cmu-top";
245 compatible = "samsung,exynos7885-cmu-fsys";
264 compatible = "samsung,exynos7885-pinctrl";
268 compatible = "samsung,exynos7885-wakeup-eint",
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Dexynos7885-jackpotlte.dts10 #include "exynos7885.dtsi"
17 compatible = "samsung,jackpotlte", "samsung,exynos7885";
DMakefile8 exynos7885-jackpotlte.dtb \
Dexynos-pinctrl.h25 * Drive strengths for Exynos5410, Exynos542x, Exynos5800, Exynos7885, Exynos850
Dexynos7885-pinctrl.dtsi3 * Samsung Exynos7885 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos7885 SoC pin-mux and pin-config options are listed as
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dsamsung,exynos7885-clock.yaml4 $id: http://devicetree.org/schemas/clock/samsung,exynos7885-clock.yaml#
7 title: Samsung Exynos7885 SoC clock controller
17 Exynos7885 clock controller is comprised of several CMU units, generating
29 'dt-bindings/clock/exynos7885.h' header.
34 - samsung,exynos7885-cmu-top
35 - samsung,exynos7885-cmu-core
36 - samsung,exynos7885-cmu-fsys
37 - samsung,exynos7885-cmu-peri
58 const: samsung,exynos7885-cmu-top
74 const: samsung,exynos7885-cmu-core
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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/
Dsamsung,pinctrl-wakeup-interrupt.yaml43 - samsung,exynos7885-wakeup-eint
101 - samsung,exynos7885-wakeup-eint
Dsamsung,pinctrl.yaml54 - samsung,exynos7885-pinctrl
/linux-6.12.1/drivers/clk/samsung/
Dclk-exynos7885.c6 * Common Clock Framework support for Exynos7885 SoC.
14 #include <dt-bindings/clock/exynos7885.h>
363 CLK_OF_DECLARE(exynos7885_cmu_top, "samsung,exynos7885-cmu-top",
583 CLK_OF_DECLARE(exynos7885_cmu_peri, "samsung,exynos7885-cmu-peri",
826 .compatible = "samsung,exynos7885-cmu-core",
829 .compatible = "samsung,exynos7885-cmu-fsys",
837 .name = "exynos7885-cmu",
Dclk-exynos-arm64.h9 * such as Exynos7885 or Exynos850 to register and init CMUs.
DMakefile21 obj-$(CONFIG_EXYNOS_ARM64_COMMON_CLK) += clk-exynos7885.o
Dclk-exynos-arm64.c9 * such as Exynos7885 or Exynos850 to register and init CMUs.
/linux-6.12.1/Documentation/devicetree/bindings/arm/samsung/
Dsamsung-boards.yaml215 - description: Exynos7885 based boards
219 - const: samsung,exynos7885
/linux-6.12.1/Documentation/devicetree/bindings/hwinfo/
Dsamsung,exynos-chipid.yaml25 - samsung,exynos7885-chipid
/linux-6.12.1/include/dt-bindings/clock/
Dexynos7885.h5 * Device Tree binding constants for Exynos7885 clock controller.
/linux-6.12.1/Documentation/devicetree/bindings/serial/
Dsamsung_uart.yaml37 - samsung,exynos7885-uart
/linux-6.12.1/Documentation/devicetree/bindings/i2c/
Dsamsung,s3c2410-i2c.yaml25 - samsung,exynos7885-i2c
/linux-6.12.1/Documentation/devicetree/bindings/soc/samsung/
Dexynos-pmu.yaml55 - samsung,exynos7885-pmu
/linux-6.12.1/Documentation/devicetree/bindings/mmc/
Dsamsung,exynos-dw-mshc.yaml30 - samsung,exynos7885-dw-mshc-smu
/linux-6.12.1/drivers/soc/samsung/
Dexynos-chipid.c59 { "EXYNOS7885", 0xE7885000 },
/linux-6.12.1/drivers/pinctrl/samsung/
Dpinctrl-exynos-arm64.c444 /* pin banks of exynos7885 pin-controller 0 (ALIVE) */
454 /* pin banks of exynos7885 pin-controller 1 (DISPAUD) */
461 /* pin banks of exynos7885 pin-controller 2 (FSYS) */
469 /* pin banks of exynos7885 pin-controller 3 (TOP) */
Dpinctrl-samsung.c1476 { .compatible = "samsung,exynos7885-pinctrl",