Searched +full:emev2 +full:- +full:smu +full:- +full:gclk (Results 1 – 3 of 3) sorted by relevance
| /linux-6.12.1/arch/arm/boot/dts/renesas/ |
| D | emev2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
12 compatible = "renesas,emev2";
13 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <1>;
28 #address-cells = <1>;
29 #size-cells = <0>;
33 compatible = "arm,cortex-a9";
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| /linux-6.12.1/Documentation/devicetree/bindings/clock/ |
| D | renesas,emev2-smu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/renesas,emev2-smu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Magnus Damm <magnus.damm@gmail.com>
15 This is not a clock provider, but clocks under SMU depend on it.
19 const: renesas,emev2-smu
24 '#address-cells':
27 '#size-cells':
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| /linux-6.12.1/drivers/clk/renesas/ |
| D | clk-emev2.c | 1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
13 /* EMEV2 SMU registers */
35 { .compatible = "renesas,emev2-smu", },
53 /* deassert reset for UART0->UART3 */ in emev2_smu_init()
59 /* deassert reset for IIC0->IIC1 */ in emev2_smu_init()
73 clk = clk_register_divider(NULL, np->name, parent_name, 0, in emev2_smu_clkdiv_init()
78 CLK_OF_DECLARE(emev2_smu_clkdiv, "renesas,emev2-smu-clkdiv",
90 clk = clk_register_gate(NULL, np->name, parent_name, 0, in emev2_smu_gclk_init()
95 CLK_OF_DECLARE(emev2_smu_gclk, "renesas,emev2-smu-gclk", emev2_smu_gclk_init);
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