| /linux-6.12.1/Documentation/ABI/testing/ |
| D | sysfs-devices-edac | 1 What: /sys/devices/system/edac/mc/mc*/reset_counters
3 Contact: linux-edac@vger.kernel.org
12 What: /sys/devices/system/edac/mc/mc*/seconds_since_reset
14 Contact: linux-edac@vger.kernel.org
19 What: /sys/devices/system/edac/mc/mc*/mc_name
21 Contact: linux-edac@vger.kernel.org
25 What: /sys/devices/system/edac/mc/mc*/size_mb
27 Contact: linux-edac@vger.kernel.org
31 What: /sys/devices/system/edac/mc/mc*/ue_count
33 Contact: linux-edac@vger.kernel.org
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| /linux-6.12.1/drivers/edac/ |
| D | xgene_edac.c | 3 * APM X-Gene SoC EDAC (error detection and correction)
11 #include <linux/edac.h>
66 static void xgene_edac_pcp_rd(struct xgene_edac *edac, u32 reg, u32 *val) in xgene_edac_pcp_rd() argument
68 *val = readl(edac->pcp_csr + reg); in xgene_edac_pcp_rd()
71 static void xgene_edac_pcp_clrbits(struct xgene_edac *edac, u32 reg, in xgene_edac_pcp_clrbits() argument
76 spin_lock(&edac->lock); in xgene_edac_pcp_clrbits()
77 val = readl(edac->pcp_csr + reg); in xgene_edac_pcp_clrbits()
79 writel(val, edac->pcp_csr + reg); in xgene_edac_pcp_clrbits()
80 spin_unlock(&edac->lock); in xgene_edac_pcp_clrbits()
83 static void xgene_edac_pcp_setbits(struct xgene_edac *edac, u32 reg, in xgene_edac_pcp_setbits() argument
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| D | ti_edac.c | 21 #include <linux/edac.h>
71 #define EDAC_MOD_NAME "ti-emif-edac"
82 static u32 ti_edac_readl(struct ti_edac *edac, u16 offset) in ti_edac_readl() argument
84 return readl_relaxed(edac->reg + offset); in ti_edac_readl()
87 static void ti_edac_writel(struct ti_edac *edac, u32 val, u16 offset) in ti_edac_writel() argument
89 writel_relaxed(val, edac->reg + offset); in ti_edac_writel()
95 struct ti_edac *edac = mci->pvt_info; in ti_edac_isr() local
100 irq_status = ti_edac_readl(edac, EMIF_IRQ_STATUS); in ti_edac_isr()
103 err_addr = ti_edac_readl(edac, EMIF_1B_ECC_ERR_ADDR_LOG); in ti_edac_isr()
104 err_count = ti_edac_readl(edac, EMIF_1B_ECC_ERR_CNT); in ti_edac_isr()
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| D | altera_edac.c | 11 #include <linux/edac.h>
77 /*********************** EDAC Memory Controller Functions ****************/
79 /* The SDRAM controller uses the EDAC Memory Controller framework. */
226 { .compatible = "altr,sdram-edac", .data = &c5_data},
227 { .compatible = "altr,sdram-edac-a10", .data = &a10_data},
452 "EDAC Probe Failed; Error %d\n", res); in altr_sdram_probe()
467 * If you want to suspend, need to disable EDAC by removing it
473 pr_err("Suspend not allowed when EDAC is enabled.\n"); in altr_sdram_prepare()
499 /************************* EDAC Parent Probe *************************/
525 /************************* EDAC Device Functions *************************/
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| D | edac_module.c | 13 #include <linux/edac.h>
44 MODULE_PARM_DESC(edac_debug_level, "EDAC debug level: [0-4], default: 2");
67 * sysfs object: /sys/devices/system/edac
71 .name = "edac",
72 .dev_name = "edac",
79 /* create the /sys/devices/system/edac directory */ in edac_subsys_init()
82 printk(KERN_ERR "Error registering toplevel EDAC sysfs dir\n"); in edac_subsys_init()
92 /* return pointer to the 'edac' node in sysfs */
168 MODULE_DESCRIPTION("Core library routines for EDAC reporting");
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| D | Kconfig | 2 # EDAC Kconfig
12 menuconfig EDAC config
13 tristate "EDAC (Error Detection And Correction) reporting"
16 EDAC is a subsystem along with hardware-specific drivers designed to
22 The mailing list for the EDAC project is linux-edac@vger.kernel.org.
24 if EDAC
27 bool "EDAC legacy sysfs"
31 Use 'Y' if your edac utilities aren't ported to work with the newer
38 This turns on debugging information for the entire EDAC subsystem.
56 tristate "Output ACPI APEI/GHES BIOS detected errors via EDAC"
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| D | edac_pci.h | 18 * Please look at Documentation/driver-api/edac.rst for more info about
19 * EDAC core structs and functions.
26 #include <linux/edac.h>
55 /* pointer to edac polling checking routine:
65 const char *ctl_name; /* edac controller name */
72 /* sysfs top name under 'edac' directory
81 /* Event counters for the this whole EDAC Device */
84 /* edac sysfs device control for the 'name'
128 * edac local routine to do pci_write_config_dword, but adds
164 * edac_pci it is going to control/register with the EDAC CORE.
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| D | edac_device.h | 18 * Please look at Documentation/driver-api/edac.rst for more info about
19 * EDAC core structs and functions.
26 #include <linux/edac.h>
38 * registering EDAC type devices which are NOT standard memory.
45 * other EDAC/ECC type devices that can be monitored for
55 * /sys/devices/system/edac/..
118 /* edac sysfs device control */
132 /* edac sysfs device control */
168 /* pointer to main 'edac' subsys in sysfs */
176 /* pointer to edac polling checking routine:
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| D | edac_mc.h | 18 * Please look at Documentation/driver-api/edac.rst for more info about
19 * EDAC core structs and functions.
38 #include <linux/edac.h>
49 printk(level "EDAC " prefix ": " fmt, ##arg)
52 printk(level "EDAC MC%d: " fmt, mci->mc_idx, ##arg)
55 printk(level "EDAC " prefix " MC%d: " fmt, mci->mc_idx, ##arg)
58 printk(level "EDAC DEVICE%d: " fmt, ctl->dev_idx, ##arg)
61 printk(level "EDAC PCI%d: " fmt, ctl->pci_idx, ##arg)
131 * edac_get_owner - Return the owner's mod_name of EDAC MC
134 * Pointer to mod_name string when EDAC MC is owned. NULL otherwise.
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| D | aspeed_edac.c | 6 #include <linux/edac.h>
18 #define DRV_NAME "aspeed-edac"
165 dev_dbg(mci->pdev, "received edac interrupt w/ mcr register 50: 0x%x\n", in mcr_isr()
194 dev_dbg(mci->pdev, "received edac interrupt, but did not find any ECC counters\n"); in mcr_isr()
197 dev_dbg(mci->pdev, "edac interrupt handled. mcr reg 50 is now: 0x%x\n", in mcr_isr()
306 /* allocate & init EDAC MC data structure */ in aspeed_probe()
336 /* register with edac core */ in aspeed_probe()
339 dev_err(&pdev->dev, "failed to register with EDAC core\n"); in aspeed_probe()
376 { .compatible = "aspeed,ast2400-sdram-edac" },
377 { .compatible = "aspeed,ast2500-sdram-edac" },
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| D | npcm_edac.c | 11 #define EDAC_MOD_NAME "npcm-edac"
279 * ~# echo 0 > /sys/kernel/debug/edac/npcm-edac/error_type
280 * ~# echo 1 > /sys/kernel/debug/edac/npcm-edac/location
281 * ~# echo 7 > /sys/kernel/debug/edac/npcm-edac/bit
282 * ~# echo 1 > /sys/kernel/debug/edac/npcm-edac/force_ecc_error
285 * ~# echo 1 > /sys/kernel/debug/edac/npcm-edac/error_type
286 * ~# echo 1 > /sys/kernel/debug/edac/npcm-edac/force_ecc_error
530 .name = "npcm-edac",
541 MODULE_DESCRIPTION("Nuvoton NPCM EDAC Driver");
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| D | debugfs.c | 34 "FAKE ERROR", "for EDAC testing only"); in edac_fake_inject_write()
47 edac_debugfs = debugfs_create_dir("edac", NULL); in edac_debugfs_init()
82 /* Create a toplevel dir under EDAC's debugfs hierarchy */
92 /* Create a toplevel dir under EDAC's debugfs hierarchy with parent @parent */
101 * Create a file under EDAC's hierarchy or a sub-hierarchy:
105 * @parent: parent dentry. If NULL, it becomes the toplevel EDAC dir
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| D | sifive_edac.c | 3 * SiFive Platform EDAC Driver
10 #include <linux/edac.h>
23 * EDAC error callback
65 dev_err(p->dci->dev, "failed to register with EDAC core\n"); in ecc_register()
117 MODULE_DESCRIPTION("SiFive platform EDAC driver");
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| D | edac_pci_sysfs.c | 10 #include <linux/edac.h>
58 /**************************** EDAC PCI sysfs instance *******************/
155 * construct one EDAC PCI instance's kobject for use
196 * unregister the kobj for the EDAC PCI instance
210 /***************************** EDAC PCI sysfs root **********************/
313 * This kobj is the 'main' kobject that EDAC PCI instances
322 /* last reference to top EDAC PCI kobject has been removed, in edac_pci_release_main_kobj()
328 /* ktype struct for the EDAC PCI main kobj */
336 * edac_pci_main_kobj_setup: Setup the sysfs for EDAC PCI attributes.
357 * level main kobj for EDAC PCI in edac_pci_main_kobj_setup()
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| D | edac_module.h | 20 * INTERNAL EDAC MODULE:
21 * EDAC memory controller sysfs create/remove functions
48 /* edac core workqueue: single CPU mode */
60 * EDAC debugfs functions
100 * EDAC PCI functions
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| D | bluefield_edac.c | 3 * Bluefield-specific EDAC driver.
11 #include <linux/edac.h>
18 #define DRIVER_NAME "bluefield-edac"
91 * and report it to the edac handler.
306 /* Register with EDAC core */ in bluefield_edac_mc_probe()
309 dev_err(dev, "failed to register with EDAC core\n"); in bluefield_edac_mc_probe()
352 MODULE_DESCRIPTION("Mellanox BlueField memory edac driver");
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| D | zynqmp_edac.c | 8 #include <linux/edac.h>
152 * @dci: Pointer to the EDAC device instance
225 * @priv: Pointer to the EDAC private struct
246 * echo <fault_count val> > /sys/kernel/debug/edac/ocm/inject_fault_count
248 * echo <bit_pos val> > /sys/kernel/debug/edac/ocm/inject_ce_bitpos
290 * echo <fault_count val> > /sys/kernel/debug/edac/ocm/inject_fault_count
292 * echo <bit_pos0 val>,<bit_pos1 val> > /sys/kernel/debug/edac/ocm/inject_ue_bitpos
454 .name = "zynqmp-ocm-edac",
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| D | edac_device_sysfs.c | 2 * file for managing the edac_device subsystem of devices for EDAC
16 #include <linux/edac.h>
184 * the reference count for the EDAC 'core' module is
194 * is called which then decrements the EDAC 'core' module.
208 /* decrement the EDAC CORE module ref count */ in edac_device_ctrl_master_release()
237 /* get the /sys/devices/system/edac reference */ in edac_device_register_sysfs_main_kobj()
262 edac_dbg(1, "Failed to register '.../edac/%s'\n", in edac_device_register_sysfs_main_kobj()
272 edac_dbg(4, "Registered '.../edac/%s' kobject\n", edac_dev->name); in edac_device_register_sysfs_main_kobj()
287 * the '..../edac/<name>' kobject
295 * Unregister the edac device's kobject and in edac_device_unregister_sysfs_main_kobj()
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| /linux-6.12.1/Documentation/devicetree/bindings/edac/ |
| D | apm-xgene-edac.txt | 1 * APM X-Gene SoC EDAC node
3 EDAC node is defined to describe on-chip error detection and correction.
11 The following section describes the EDAC DT node binding.
14 - compatible : Shall be "apm,xgene-edac".
28 - compatible : Shall be "apm,xgene-edac-mc".
34 - compatible : Shall be "apm,xgene-edac-pmd" or
35 "apm,xgene-edac-pmd-v2".
40 - compatible : Shall be "apm,xgene-edac-l3" or
41 "apm,xgene-edac-l3-v2".
42 - reg : First resource shall be the L3 EDAC resource.
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| D | amazon,al-mc-edac.yaml | 4 $id: http://devicetree.org/schemas/edac/amazon,al-mc-edac.yaml#
7 title: Amazon's Annapurna Labs Memory Controller EDAC
14 EDAC node is defined to describe on-chip error detection and correction for
20 const: amazon,al-mc-edac
57 edac@f0080000 {
60 compatible = "amazon,al-mc-edac";
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| D | aspeed-sdram-edac.txt | 1 Aspeed BMC SoC EDAC node
15 - "aspeed,ast2400-sdram-edac"
16 - "aspeed,ast2500-sdram-edac"
17 - "aspeed,ast2600-sdram-edac"
24 edac: sdram@1e6e0000 {
25 compatible = "aspeed,ast2500-sdram-edac";
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| /linux-6.12.1/Documentation/driver-api/ |
| D | edac.rst | 1 Error Detection And Correction (EDAC) Devices
4 Main Concepts used at the EDAC subsystem
123 Most of the EDAC core is focused on doing Memory Controller error detection.
125 to describe the memory controllers, with is an opaque struct for the EDAC
126 drivers. Only the EDAC core is allowed to touch it.
128 .. kernel-doc:: include/linux/edac.h
130 .. kernel-doc:: drivers/edac/edac_mc.h
135 The EDAC subsystem provides a mechanism to handle PCI controllers by calling
139 .. kernel-doc:: drivers/edac/edac_pci.h
141 EDAC Blocks
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| /linux-6.12.1/Documentation/admin-guide/RAS/ |
| D | main.rst | 186 either by BIOS, by some special CPUs or by Linux EDAC driver. On x86 64
208 EDAC - Error Detection And Correction
219 Kernel 2.6.16, it was renamed to ``EDAC``.
224 The ``edac`` kernel module's goal is to detect and report hardware errors
246 A new feature for EDAC, the ``edac_device`` class of device, was added in
274 the EDAC PCI scanning code. If that attribute is set, PCI parity/error
286 EDAC is composed of a "core" module (``edac_core.ko``) and several Memory
299 If ``edac`` was statically linked with the kernel then no loading
300 is necessary. If ``edac`` was built as modules then simply modprobe
301 the ``edac`` pieces that you need. You should be able to modprobe
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| /linux-6.12.1/Documentation/devicetree/bindings/arm/altera/ |
| D | socfpga-sdram-edac.txt | 1 Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
2 The EDAC accesses a range of registers in the SDRAM controller.
5 - compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10"
12 compatible = "altr,sdram-edac";
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| /linux-6.12.1/Documentation/firmware-guide/acpi/apei/ |
| D | einj.rst | 199 [22715.830801] EDAC sbridge MC3: HANDLING MCE MEMORY ERROR
200 [22715.834759] EDAC sbridge MC3: CPU 0: Machine Check Event: 0 Bank 7: 8c00004000010090
201 [22715.834759] EDAC sbridge MC3: TSC 0
202 [22715.834759] EDAC sbridge MC3: ADDR 12345000 EDAC sbridge MC3: MISC 144780c86
203 [22715.834759] EDAC sbridge MC3: PROCESSOR 0:306e7 TIME 1422553404 SOCKET 0 APIC 0
204 …[22716.616173] EDAC MC3: 1 CE memory read error on CPU_SrcID#0_Channel#0_DIMM#0 (channel:0 slot:0 …
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