/linux-6.12.1/Documentation/devicetree/bindings/net/ |
D | toshiba,visconti-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/toshiba,visconti-dwmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Toshiba Visconti DWMAC Ethernet controller 10 - Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> 17 - toshiba,visconti-dwmac 19 - compatible 22 - $ref: snps,dwmac.yaml# 27 - items: [all …]
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D | allwinner,sun8i-a83t-emac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chen-Yu Tsai <wens@csie.org> 11 - Maxime Ripard <mripard@kernel.org> 16 - const: allwinner,sun8i-a83t-emac 17 - const: allwinner,sun8i-h3-emac 18 - const: allwinner,sun8i-r40-gmac 19 - const: allwinner,sun8i-v3s-emac [all …]
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D | starfive,jh7110-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/net/starfive,jh7110-dwmac.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: StarFive JH7110 DWMAC glue layer 11 - Emil Renner Berthing <kernel@esmil.dk> 12 - Samin Guo <samin.guo@starfivetech.com> 19 - starfive,jh7100-dwmac 20 - starfive,jh7110-dwmac 22 - compatible [all …]
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D | intel,dwmac-plat.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Intel DWMAC glue layer 10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com> 17 - intel,keembay-dwmac 19 - compatible 22 - $ref: snps,dwmac.yaml# 27 - items: [all …]
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D | snps,dwmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/snps,dwmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alexandre Torgue <alexandre.torgue@foss.st.com> 11 - Giuseppe Cavallaro <peppe.cavallaro@st.com> 12 - Jose Abreu <joabreu@synopsys.com> 23 - snps,dwmac 24 - snps,dwmac-3.40a 25 - snps,dwmac-3.50a [all …]
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D | loongson,ls1b-gmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/loongson,ls1b-gmac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson-1B Gigabit Ethernet MAC Controller 10 - Keguang Zhang <keguang.zhang@gmail.com> 13 Loongson-1B Gigabit Ethernet MAC Controller is based on 17 - Dual 10/100/1000Mbps GMAC controllers 18 - Full-duplex operation (IEEE 802.3x flow control automatic transmission) 19 - Half-duplex operation (CSMA/CD Protocol and back-pressure support) [all …]
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D | loongson,ls1c-emac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/loongson,ls1c-emac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Loongson-1C Ethernet MAC Controller 10 - Keguang Zhang <keguang.zhang@gmail.com> 13 Loongson-1C Ethernet MAC Controller is based on 17 - 10/100Mbps 18 - Full-duplex operation (IEEE 802.3x flow control automatic transmission) 19 - Half-duplex operation (CSMA/CD Protocol and back-pressure support) [all …]
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D | qcom,ethqos.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bhupesh Sharma <bhupesh.sharma@linaro.org> 17 - $ref: snps,dwmac.yaml# 22 - qcom,qcs404-ethqos 23 - qcom,sa8775p-ethqos 24 - qcom,sc8280xp-ethqos 25 - qcom,sm8150-ethqos 30 reg-names: [all …]
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/linux-6.12.1/arch/loongarch/boot/dts/ |
D | loongson-2k2000-ref.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include "loongson-2k2000.dtsi" 11 compatible = "loongson,ls2k2000-ref", "loongson,ls2k2000"; 12 model = "Loongson-2K2000 Reference Board"; 19 stdout-path = "serial0:115200n8"; 28 reserved-memory { 29 #address-cells = <2>; 30 #size-cells = <2>; 34 compatible = "shared-dma-pool"; [all …]
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D | loongson-2k1000-ref.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include "loongson-2k1000.dtsi" 11 compatible = "loongson,ls2k1000-ref", "loongson,ls2k1000"; 12 model = "Loongson-2K1000 Reference Board"; 19 stdout-path = "serial0:115200n8"; 29 reserved-memory { 30 #address-cells = <2>; 31 #size-cells = <2>; 35 compatible = "shared-dma-pool"; [all …]
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/linux-6.12.1/drivers/net/ethernet/stmicro/stmmac/ |
D | stmmac_platform.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 Copyright (C) 2007-2011 STMicroelectronics Ltd 26 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins 57 * dwmac1000_validate_ucast_entries - validate the Unicast address entries 88 * stmmac_axi_setup - parse DT parameters for programming the AXI register 91 * if required, from device-tree the AXI internal register can be tuned 99 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0); in stmmac_axi_setup() 103 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL); in stmmac_axi_setup() 106 return ERR_PTR(-ENOMEM); in stmmac_axi_setup() 109 axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en"); in stmmac_axi_setup() [all …]
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D | dwmac-socfpga.c | 1 // SPDX-License-Identifier: GPL-2.0-only 4 * Adopted from dwmac-sti.c 7 #include <linux/mfd/altera-sysmgr.h> 13 #include <linux/mdio/mdio-regmap.h> 14 #include <linux/pcs-lynx.h> 66 struct socfpga_dwmac *dwmac = (struct socfpga_dwmac *)priv; in socfpga_dwmac_fix_mac_speed() local 67 void __iomem *splitter_base = dwmac->splitter_base; in socfpga_dwmac_fix_mac_speed() 68 void __iomem *sgmii_adapter_base = dwmac->sgmii_adapter_base; in socfpga_dwmac_fix_mac_speed() 69 struct device *dev = dwmac->dev; in socfpga_dwmac_fix_mac_speed() 71 struct phy_device *phy_dev = ndev->phydev; in socfpga_dwmac_fix_mac_speed() [all …]
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D | dwmac-sun8i.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * dwmac-sun8i.c - Allwinner sun8i DWMAC specific glue layer 11 #include <linux/mdio-mux.h> 28 /* General notes on dwmac-sun8i: 33 /* struct emac_variant - Describe dwmac-sun8i hardware variant 61 /* struct sunxi_priv_data - hold all sunxi private data 69 * @mux_handle: Internal pointer used by mdio-mux lib 147 * co-packaged AC200 chip instead. 283 /* sun8i_dwmac_dma_reset() - reset the EMAC 284 * Called from stmmac via stmmac_dma_ops->reset [all …]
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/linux-6.12.1/arch/riscv/boot/dts/starfive/ |
D | jh7110-starfive-visionfive-2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 /dts-v1/; 8 #include "jh7110-common.dtsi" 17 phy-handle = <&phy1>; 18 phy-mode = "rgmii-id"; 21 mdio { 22 #address-cells = <1>; 23 #size-cells = <0>; 24 compatible = "snps,dwmac-mdio"; 26 phy1: ethernet-phy@1 { [all …]
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D | jh7110-pine64-star64.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 6 /dts-v1/; 7 #include "jh7110-common.dtsi" 18 starfive,tx-use-rgmii-clk; 19 assigned-clocks = <&aoncrg JH7110_AONCLK_GMAC0_TX>; 20 assigned-clock-parents = <&aoncrg JH7110_AONCLK_GMAC0_RMII_RTX>; 24 phy-handle = <&phy1>; 25 phy-mode = "rgmii-id"; 26 starfive,tx-use-rgmii-clk; 27 assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>; [all …]
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/linux-6.12.1/arch/arm64/boot/dts/amlogic/ |
D | amlogic-c3.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/reset/amlogic,c3-reset.h> 10 #include <dt-bindings/clock/amlogic,c3-pll-clkc.h> 11 #include <dt-bindings/clock/amlogic,c3-scmi-clkc.h> 12 #include <dt-bindings/clock/amlogic,c3-peripherals-clkc.h> 13 #include <dt-bindings/power/amlogic,c3-pwrc.h> 14 #include <dt-bindings/gpio/amlogic-c3-gpio.h> [all …]
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D | meson-s4.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/gpio/meson-s4-gpio.h> 10 #include <dt-bindings/clock/amlogic,s4-pll-clkc.h> 11 #include <dt-bindings/clock/amlogic,s4-peripherals-clkc.h> 12 #include <dt-bindings/power/meson-s4-power.h> 13 #include <dt-bindings/reset/amlogic,meson-s4-reset.h> 17 #address-cells = <2>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/axis/ |
D | artpec6-devboard.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 // Axis ARTPEC-6 development board. 4 /dts-v1/; 8 model = "ARTPEC-6 development board"; 9 compatible = "axis,artpec6-dev-board", "axis,artpec6"; 19 stdout-path = "serial3:115200n8"; 51 phy-handle = <&phy1>; 52 phy-mode = "gmii"; 54 mdio { 55 #address-cells = <0x1>; [all …]
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/linux-6.12.1/arch/arm64/boot/dts/qcom/ |
D | sa8775p-ride.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 8 #include "sa8775p-ride.dtsi" 12 compatible = "qcom,sa8775p-ride", "qcom,sa8775p"; 16 phy-mode = "sgmii"; 20 phy-mode = "sgmii"; 23 &mdio { 24 compatible = "snps,dwmac-mdio"; 25 #address-cells = <1>; 26 #size-cells = <0>; [all …]
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D | sa8775p-ride-r3.dts | 1 // SPDX-License-Identifier: BSD-3-Clause 6 /dts-v1/; 8 #include "sa8775p-ride.dtsi" 12 compatible = "qcom,sa8775p-ride-r3", "qcom,sa8775p"; 16 phy-mode = "2500base-x"; 20 phy-mode = "2500base-x"; 23 &mdio { 24 compatible = "snps,dwmac-mdio"; 25 #address-cells = <1>; 26 #size-cells = <0>; [all …]
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D | qcs404-evb-4000.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include "qcs404-evb.dtsi" 13 compatible = "qcom,qcs404-evb-4000", "qcom,qcs404-evb", 20 snps,reset-gpio = <&tlmm 60 GPIO_ACTIVE_LOW>; 21 snps,reset-active-low; 22 snps,reset-delays-us = <0 10000 10000>; 24 pinctrl-names = "default"; 25 pinctrl-0 = <ðernet_defaults>; [all …]
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/linux-6.12.1/arch/arm/boot/dts/rockchip/ |
D | rk3228-evb.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 /dts-v1/; 9 compatible = "rockchip,rk3228-evb", "rockchip,rk3228"; 20 vcc_phy: vcc-phy-regulator { 21 compatible = "regulator-fixed"; 22 enable-active-high; 23 regulator-name = "vcc_phy"; 24 regulator-min-microvolt = <1800000>; 25 regulator-max-microvolt = <1800000>; 26 regulator-always-on; [all …]
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/linux-6.12.1/arch/mips/boot/dts/loongson/ |
D | loongson64-2k1000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 /dts-v1/; 5 #include <dt-bindings/interrupt-controller/irq.h> 10 #address-cells = <2>; 11 #size-cells = <2>; 14 #address-cells = <1>; 15 #size-cells = <0>; 21 #clock-cells = <1>; 27 #clock-cells = <0>; 28 compatible = "fixed-clock"; [all …]
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/linux-6.12.1/arch/arm64/boot/dts/freescale/ |
D | imx93-var-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 12 model = "Variscite VAR-SOM-MX93 module"; 13 compatible = "variscite,var-som-mx93", "fsl,imx93"; 15 mmc_pwrseq: mmc-pwrseq { 16 compatible = "mmc-pwrseq-simple"; 17 post-power-on-delay-ms = <100>; 18 power-off-delay-us = <10000>; 19 reset-gpios = <&gpio4 14 GPIO_ACTIVE_LOW>, /* WIFI_RESET */ 23 reg_eqos_phy: regulator-eqos-phy { [all …]
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/linux-6.12.1/arch/arm/boot/dts/intel/socfpga/ |
D | socfpga_arria10_mercury_aa1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 11 compatible = "enclustra,mercury-aa1", "altr,socfpga-arria10", "altr,socfpga"; 25 stdout-path = "serial1:115200n8"; 30 phy-mode = "rgmii"; 31 phy-addr = <0xffffffff>; /* probe for phy addr */ 33 max-frame-size = <3800>; 35 phy-handle = <&phy3>; 37 mdio { 38 #address-cells = <1>; 39 #size-cells = <0>; [all …]
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