Searched +full:dt +full:- +full:bindings (Results 1 – 25 of 1111) sorted by relevance
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/linux-6.12.1/Documentation/devicetree/bindings/clock/ |
D | qcom,sc7280-lpasscorecc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sc7280-lpasscorecc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Taniya Das <quic_tdas@quicinc.com> 17 include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h 18 include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h 23 clock-names: true 29 - qcom,sc7280-lpassaoncc 30 - qcom,sc7280-lpassaudiocc [all …]
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D | qcom,gpucc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Taniya Das <quic_tdas@quicinc.com> 17 include/dt-bindings/clock/qcom,gpucc-sdm845.h 18 include/dt-bindings/clock/qcom,gpucc-sa8775p.h 19 include/dt-bindings/clock/qcom,gpucc-sc7180.h 20 include/dt-bindings/clock/qcom,gpucc-sc7280.h 21 include/dt-bindings/clock/qcom,gpucc-sc8280xp.h 22 include/dt-bindings/clock/qcom,gpucc-sm6350.h [all …]
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D | qcom,sm8450-gpucc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Konrad Dybcio <konradybcio@kernel.org> 17 include/dt-bindings/clock/qcom,sm4450-gpucc.h 18 include/dt-bindings/clock/qcom,sm8450-gpucc.h 19 include/dt-bindings/clock/qcom,sm8550-gpucc.h 20 include/dt-bindings/reset/qcom,sm8450-gpucc.h 21 include/dt-bindings/reset/qcom,sm8650-gpucc.h [all …]
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D | maxim,max77686.txt | 3 This is a part of device tree bindings of MAX77686/MAX77802/MAX77620 4 multi-function device. More information can be found in MFD DT binding 6 bindings/mfd/max77686.txt for MAX77686 and 7 bindings/mfd/max77802.txt for MAX77802 and 8 bindings/mfd/max77620.txt for MAX77620. 12 dt-bindings/clock/maxim,max77686.h. 17 dt-bindings/clock/maxim,max77802.h. 21 dt-bindings/clock/maxim,max77620.h. 27 - #clock-cells: from common clock binding; shall be set to 1. 30 - clock-output-names: From common clock binding. [all …]
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D | qcom,sm8450-camcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> 11 - Jagadeesh Kona <quic_jkona@quicinc.com> 18 include/dt-bindings/clock/qcom,sc8280xp-camcc.h 19 include/dt-bindings/clock/qcom,sm8450-camcc.h 20 include/dt-bindings/clock/qcom,sm8550-camcc.h 21 include/dt-bindings/clock/qcom,sm8650-camcc.h [all …]
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D | qcom,sc7180-lpasscorecc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,sc7180-lpasscorecc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Taniya Das <quic_tdas@quicinc.com> 16 See also:: include/dt-bindings/clock/qcom,lpasscorecc-sc7180.h 21 - qcom,sc7180-lpasshm 22 - qcom,sc7180-lpasscorecc 26 - description: gcc_lpass_sway clock from GCC 27 - description: Board XO source [all …]
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D | qcom,videocc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Taniya Das <quic_tdas@quicinc.com> 17 include/dt-bindings/clock/qcom,videocc-sc7180.h 18 include/dt-bindings/clock/qcom,videocc-sc7280.h 19 include/dt-bindings/clock/qcom,videocc-sdm845.h 20 include/dt-bindings/clock/qcom,videocc-sm8150.h 21 include/dt-bindings/clock/qcom,videocc-sm8250.h 26 - qcom,sc7180-videocc [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/power/ |
D | rockchip,power-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Elaine Zhang <zhangqing@rock-chips.com> 11 - Heiko Stuebner <heiko@sntech.de> 18 Power domains contained within power-controller node are 20 Documentation/devicetree/bindings/power/power-domain.yaml. 23 "power-domains" property that is a phandle for the 28 const: power-controller [all …]
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D | mediatek,power-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/mediatek,power-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - MandyJH Liu <mandyjh.liu@mediatek.com> 11 - Matthias Brugger <mbrugger@suse.com> 17 IP cores belonging to a power domain should contain a 'power-domains' 22 pattern: '^power-controller(@[0-9a-f]+)?$' 26 - mediatek,mt6795-power-controller 27 - mediatek,mt8167-power-controller [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/ |
D | submitting-patches.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 Submitting Devicetree (DT) binding patches 11 Documentation/process/submitting-patches.rst applies. 13 1) The Documentation/ and include/dt-bindings/ portion of the patch should 16 "dt-bindings: <binding dir>: ..." 21 "<binding dir>: dt-bindings: ..." 24 use "Documentation" or "doc" because that is implied. All bindings are 27 2) DT binding files are written in DT schema format using json-schema 28 vocabulary and YAML file format. The DT binding files must pass validation 33 See Documentation/devicetree/bindings/writing-schema.rst for more details [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/serial/ |
D | atmel,at91-usart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Richard Genoud <richard.genoud@bootlin.com> 16 - enum: 17 - atmel,at91rm9200-usart 18 - atmel,at91sam9260-usart 19 - items: 20 - const: atmel,at91rm9200-dbgu [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/display/mediatek/ |
D | mediatek,wdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 24 - enum: 25 - mediatek,mt8173-disp-wdma 26 - items: 27 - const: mediatek,mt6795-disp-wdma [all …]
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D | mediatek,ovl-2l.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,ovl-2l.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 14 Mediatek display overlay 2 layer, namely OVL-2L, provides 2 more layer 16 OVL-2L device node must be siblings to the central MMSYS_CONFIG node. 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 24 - enum: [all …]
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D | mediatek,ovl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 24 - enum: 25 - mediatek,mt2701-disp-ovl 26 - mediatek,mt8173-disp-ovl 27 - mediatek,mt8183-disp-ovl [all …]
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D | mediatek,postmask.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 24 - enum: 25 - mediatek,mt8192-disp-postmask 26 - items: 27 - enum: [all …]
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D | mediatek,rdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 15 data into DMA. It provides real time data to the back-end panel 20 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 26 - enum: 27 - mediatek,mt2701-disp-rdma 28 - mediatek,mt8173-disp-rdma [all …]
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D | mediatek,ccorr.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 24 - enum: 25 - mediatek,mt8183-disp-ccorr 26 - mediatek,mt8192-disp-ccorr 27 - items: [all …]
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D | mediatek,dither.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 19 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 25 - enum: 26 - mediatek,mt8183-disp-dither 27 - items: 28 - enum: [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/i2c/ |
D | st,stm32-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com> 13 - $ref: /schemas/i2c/i2c-controller.yaml# 14 - if: 19 - st,stm32f7-i2c 20 - st,stm32mp13-i2c 21 - st,stm32mp15-i2c [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/media/ |
D | nxp,imx8mq-vpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Philipp Zabel <p.zabel@pengutronix.de> 19 - const: nxp,imx8mq-vpu 21 - const: nxp,imx8mq-vpu-g1 22 - const: nxp,imx8mq-vpu-g2 23 - const: nxp,imx8mm-vpu-g1 34 power-domains: [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/soc/mediatek/ |
D | mediatek,mutex.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Philipp Zabel <p.zabel@pengutronix.de> 15 Start Of Frame (SOF) / End Of Frame (EOF) to each sub-modules on the display 21 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml 27 - mediatek,mt2701-disp-mutex 28 - mediatek,mt2712-disp-mutex 29 - mediatek,mt6795-disp-mutex [all …]
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D | mediatek,wdma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Matthias Brugger <matthias.bgg@gmail.com> 11 - Moudy Ho <moudy.ho@mediatek.com> 20 - enum: 21 - mediatek,mt8183-mdp3-wdma 26 mediatek,gce-client-reg: 27 $ref: /schemas/types.yaml#/definitions/phandle-array 30 - description: phandle of GCE [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/pci/ |
D | nvidia,tegra194-pcie-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie-ep.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 12 - Vidya Sagar <vidyas@nvidia.com> 16 inherits all the common properties defined in snps,dw-pcie-ep.yaml. Some 23 Note: On Tegra194's P2972-0000 platform, only C5 controller can be enabled to 29 - nvidia,tegra194-pcie-ep [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/remoteproc/ |
D | qcom,sc7280-adsp-pil.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-adsp-pil.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> 19 - qcom,sc7280-adsp-pil 23 - description: qdsp6ss register 24 - description: efuse q6ss register 28 - description: Phandle to apps_smmu node with sid mask 32 - description: Watchdog interrupt [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/ |
D | mediatek,mt8192-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8192-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sean Wang <sean.wang@mediatek.com> 17 const: mediatek,mt8192-pinctrl 19 gpio-controller: true 21 '#gpio-cells': 28 gpio-ranges: 32 gpio-line-names: true [all …]
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