Searched +full:dmc +full:- +full:520 (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/edac/dmc-520.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: ARM DMC-520 EDAC10 - Lei Wang <lewan@microsoft.com>13 DMC-520 node is defined to describe DRAM error detection and correction.20 - const: brcm,dmc-52021 - const: arm,dmc-52030 interrupt-names:[all …]
1 // SPDX-License-Identifier: GPL-2.04 * EDAC driver for DMC-520 memory controller.25 /* DMC-520 registers */43 /* DMC-520 types, masks and bitfields */78 * The max-length message would be: "rank:7 bank:15 row:262143 col:1023".79 * Max length is 34. Using a 40-size buffer is enough.82 #define EDAC_MOD_NAME "dmc520-edac"165 * error_lock is to protect concurrent writes to the mci->error_desc through180 return readl(pvt->reg_base + offset); in dmc520_read_reg()185 writel(val, pvt->reg_base + offset); in dmc520_write_reg()[all …]
16 EDAC is a subsystem along with hardware-specific drivers designed to17 report hardware errors. These are low-level errors that are reported22 The mailing list for the EDAC project is linux-edac@vger.kernel.org.40 levels are 0-4 (from low to high) and by default it is set to 2.44 tristate "Decode MCEs in human-readable form (only on AMD for now)"49 occurring on your machine in human-readable form.60 Not all machines support hardware-driven error report. Some of those61 provide a BIOS-driven error report mechanism via ACPI, using the65 When this option is enabled, it will disable the hardware-driven69 It should be noticed that keeping both GHES and a hardware-driven[all …]