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/linux-6.12.1/Documentation/devicetree/bindings/media/
Dst,stm32-dma2d.yaml4 $id: http://devicetree.org/schemas/media/st,stm32-dma2d.yaml#
7 title: STMicroelectronics STM32 Chrom-Art Accelerator DMA2D
10 Chrom-ART Accelerator(DMA2D), graphical hardware accelerator
30 const: st,stm32-dma2d
43 - const: dma2d
62 dma2d: dma2d@4002b000 {
63 compatible = "st,stm32-dma2d";
66 resets = <&rcc STM32F4_AHB1_RESET(DMA2D)>;
67 clocks = <&rcc 0 STM32F4_AHB1_CLOCK(DMA2D)>;
68 clock-names = "dma2d";
/linux-6.12.1/drivers/media/platform/st/stm32/
DMakefile4 stm32-dma2d-objs := dma2d/dma2d.o dma2d/dma2d-hw.o
5 obj-$(CONFIG_VIDEO_STM32_DMA2D) += stm32-dma2d.o
DKconfig37 tristate "STM32 Chrom-Art Accelerator (DMA2D)"
44 Enables DMA2D hardware support on stm32.
46 The STM32 DMA2D is a memory-to-memory engine for pixel conversion
/linux-6.12.1/drivers/media/platform/st/stm32/dma2d/
Ddma2d.h3 * ST stm32 DMA2D - 2D Graphics Accelerator Driver
21 #define DMA2D_NAME "stm-dma2d"
22 #define BUS_INFO "platform:stm-dma2d"
Ddma2d.c3 * STM32 DMA2D - 2D Graphics Accelerator Driver
31 #include "dma2d.h"
32 #include "dma2d-regs.h"
620 dev->gate = clk_get(&pdev->dev, "dma2d"); in dma2d_probe()
622 dev_err(&pdev->dev, "failed to get dma2d clock gate\n"); in dma2d_probe()
629 dev_err(&pdev->dev, "failed to prepare dma2d clock gate\n"); in dma2d_probe()
711 .compatible = "st,stm32-dma2d",
730 MODULE_DESCRIPTION("STM32 Chrom-Art Accelerator DMA2D driver");
Ddma2d-hw.c16 #include "dma2d.h"
17 #include "dma2d-regs.h"
/linux-6.12.1/arch/arm/boot/dts/st/
Dstm32f429.dtsi746 dma2d: dma2d@4002b000 { label
747 compatible = "st,stm32-dma2d";
750 resets = <&rcc STM32F4_AHB1_RESET(DMA2D)>;
751 clocks = <&rcc 0 STM32F4_AHB1_CLOCK(DMA2D)>;
752 clock-names = "dma2d";
Dstm32f469-disco.dts128 &dma2d {
/linux-6.12.1/Documentation/admin-guide/media/
Dplatform-cardlist.rst62 stm32-dma2d STM32 Chrom-Art Accelerator Unit
/linux-6.12.1/drivers/clk/
Dclk-stm32f4.c72 { STM32F4_RCC_AHB1ENR, 23, "dma2d", "ahb_div" },
151 { STM32F4_RCC_AHB1ENR, 23, "dma2d", "ahb_div" },
232 { STM32F4_RCC_AHB1ENR, 23, "dma2d", "ahb_div" },
306 { STM32F4_RCC_AHB1ENR, 23, "dma2d", "ahb_div" },
Dclk-stm32h7.c1004 PER_CLK(RCC_AHB3ENR, 4, "dma2d", "hclk"),