Searched +full:dis +full:- +full:u2 +full:- +full:freeclk +full:- +full:exists +full:- +full:quirk (Results 1 – 8 of 8) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/usb/ |
D | rockchip,rk3399-dwc3.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/usb/rockchip,rk3399-dwc3.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 14 const: rockchip,rk3399-dwc3 16 '#address-cells': 19 '#size-cells': 26 - description: 28 - description: [all …]
|
D | snps,dwc3.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Felipe Balbi <balbi@kernel.org> 14 be presented as a standalone DT node with an optional vendor-specific 18 - $ref: usb-drd.yaml# 19 - if: 25 - dr_mode 29 $ref: usb-xhci.yaml# 35 - const: snps,dwc3 [all …]
|
D | fsl,imx8mp-dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/usb/fsl,imx8mp-dwc3.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Li Jun <jun.li@nxp.com> 15 const: fsl,imx8mp-dwc3 19 - description: Address and length of the register set for HSIO Block Control 20 - description: Address and length of the register set for the wrapper of dwc3 core on the SOC. 22 "#address-cells": 25 "#size-cells": [all …]
|
/linux-6.12.1/arch/arm64/boot/dts/rockchip/ |
D | rk3588-extra.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "rk3588-base.dtsi" 7 #include "rk3588-extra-pinctrl.dtsi" 11 compatible = "rockchip,rk3588-dwc3", "snps,dwc3"; 16 clock-names = "ref_clk", "suspend_clk", "bus_clk"; 19 phy-names = "usb2-phy", "usb3-phy"; 21 power-domains = <&power RK3588_PD_USB>; 24 snps,dis-u2-freeclk-exists-quirk; 25 snps,dis-del-phy-power-chg-quirk; 26 snps,dis-tx-ipgap-linecheck-quirk; [all …]
|
D | rk3588-base.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rk3588-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/power/rk3588-power.h> 10 #include <dt-bindings/reset/rockchip,rk3588-cru.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/ata/ahci.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
|
D | rk3399-base.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3399-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3399-power.h> 12 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; [all …]
|
D | rk3328.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3328-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3328-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 18 interrupt-parent = <&gic>; [all …]
|
/linux-6.12.1/drivers/usb/dwc3/ |
D | core.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * core.c - DesignWare USB3 DRD Controller Core file 5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com 24 #include <linux/dma-mapping.h> 42 #include "../host/xhci-ext-caps.h" 47 * dwc3_get_dr_mode - Validates and sets dr_mode 53 struct device *dev = dwc->dev; in dwc3_get_dr_mode() 56 if (dwc->dr_mode == USB_DR_MODE_UNKNOWN) in dwc3_get_dr_mode() 57 dwc->dr_mode = USB_DR_MODE_OTG; in dwc3_get_dr_mode() 59 mode = dwc->dr_mode; in dwc3_get_dr_mode() [all …]
|