| /linux-6.12.1/Documentation/devicetree/bindings/net/ |
| D | marvell,dfx-server.yaml | 4 $id: http://devicetree.org/schemas/net/marvell,dfx-server.yaml#
7 title: Marvell Prestera DFX server
16 const: marvell,dfx-server
23 - const: marvell,dfx-server
42 # The DFX server may expose clocks described as subnodes
55 dfx-bus@ac000000 {
56 compatible = "marvell,dfx-server", "simple-bus";
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| D | marvell,prestera.yaml | 32 dfx:
33 description: Reference to the DFX Server bus node.
58 dfx: false
74 dfx = <&dfx>;
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| /linux-6.12.1/Documentation/devicetree/bindings/fpga/ |
| D | xlnx,pr-decoupler.yaml | 21 Xilinx LogiCORE Dynamic Function eXchange(DFX) AXI shutdown manager Softcore
27 interrupted by DFX.
38 - const: xlnx,dfx-axi-shutdown-manager-1.00
39 - const: xlnx,dfx-axi-shutdown-manager
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| /linux-6.12.1/drivers/crypto/hisilicon/hpre/ |
| D | hpre_crypto.c | 187 struct hpre_dfx *dfx; in hpre_add_req_to_ctx() local
198 dfx = ctx->hpre->debug.dfx; in hpre_add_req_to_ctx()
199 if (atomic64_read(&dfx[HPRE_OVERTIME_THRHLD].value)) in hpre_add_req_to_ctx()
437 struct hpre_dfx *dfx = ctx->hpre->debug.dfx; in hpre_dh_cb() local
447 overtime_thrhld = atomic64_read(&dfx[HPRE_OVERTIME_THRHLD].value); in hpre_dh_cb()
449 atomic64_inc(&dfx[HPRE_OVER_THRHLD_CNT].value); in hpre_dh_cb()
453 atomic64_inc(&dfx[HPRE_RECV_CNT].value); in hpre_dh_cb()
458 struct hpre_dfx *dfx = ctx->hpre->debug.dfx; in hpre_rsa_cb() local
466 overtime_thrhld = atomic64_read(&dfx[HPRE_OVERTIME_THRHLD].value); in hpre_rsa_cb()
468 atomic64_inc(&dfx[HPRE_OVER_THRHLD_CNT].value); in hpre_rsa_cb()
[all …]
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| D | hpre.h | 66 struct hpre_dfx dfx[HPRE_DFX_FILE_NUM]; member
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| D | hpre_main.c | 340 /* define the HPRE's dfx regs region and region length */
1048 struct hpre_dfx *dfx = hpre->debug.dfx; in hpre_dfx_debug_init() local
1054 dfx[i].type = i; in hpre_dfx_debug_init()
1055 debugfs_create_file(hpre_dfx_files[i], 0644, parent, &dfx[i], in hpre_dfx_debug_init()
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| /linux-6.12.1/drivers/net/ethernet/hisilicon/hns3/hns3pf/ |
| D | hclge_regs.c | 65 /* Get DFX BD number offset */
309 "Get dfx bd num fail, status is %d.\n", ret); in hclge_get_dfx_reg_bd_num()
342 "Query dfx reg cmd(0x%x) send fail, status is %d.\n", in hclge_dfx_reg_cmd_send()
365 "failed to query dfx rpu tnl reg, ret = %d\n", in hclge_dfx_reg_rpu_tnl_cmd_send()
404 "Get dfx reg bd num fail, status is %d.\n", ret); in hclge_get_dfx_reg_len()
465 "Get dfx reg bd num fail, status is %d.\n", ret); in hclge_get_dfx_reg()
486 "Get dfx reg fail, status is %d.\n", ret); in hclge_get_dfx_reg()
602 "Get dfx reg len failed, ret = %d.\n", ret); in hclge_get_regs_len()
667 "Get dfx register failed, ret = %d.\n", ret); in hclge_get_regs()
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| D | hclge_debugfs.h | 21 /* Get DFX BD number offset */
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| /linux-6.12.1/drivers/crypto/hisilicon/zip/ |
| D | zip_crypto.c | 215 struct hisi_zip_dfx *dfx = &qp_ctx->zip_dev->dfx; in hisi_zip_do_work() local
247 atomic64_inc(&dfx->send_cnt); in hisi_zip_do_work()
252 atomic64_inc(&dfx->send_busy_cnt); in hisi_zip_do_work()
286 struct hisi_zip_dfx *dfx = &qp_ctx->zip_dev->dfx; in hisi_zip_acomp_cb() local
296 atomic64_inc(&dfx->recv_cnt); in hisi_zip_acomp_cb()
302 atomic64_inc(&dfx->err_bd_cnt); in hisi_zip_acomp_cb()
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| D | zip.h | 29 struct hisi_zip_dfx dfx; member
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| D | zip_main.c | 314 /* define the ZIP's dfx regs region and region length */
841 struct hisi_zip_dfx *dfx = &zip->dfx; in hisi_zip_dfx_debug_init() local
848 data = (atomic64_t *)((uintptr_t)dfx + zip_dfx_files[i].offset); in hisi_zip_dfx_debug_init()
1020 /* dump last word for dfx regs during control resetting */ in hisi_zip_show_last_dfx_regs()
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| /linux-6.12.1/arch/arm/boot/dts/marvell/ |
| D | armada-xp-98dx3236.dtsi | 227 dfx: dfx-server@ac000000 { label
228 compatible = "marvell,dfx-server", "simple-bus";
259 dfx = <&dfx>;
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| /linux-6.12.1/drivers/fpga/ |
| D | xilinx-pr-decoupler.c | 91 .name = "Xilinx DFX AXI Shutdown Manager",
97 { .compatible = "xlnx,dfx-axi-shutdown-manager-1.00",
99 { .compatible = "xlnx,dfx-axi-shutdown-manager",
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| /linux-6.12.1/Documentation/fb/ |
| D | sstfb.rst | 8 This is a frame buffer device driver for 3dfx' Voodoo Graphics
37 Then configure your kernel as usual: choose "m" or "y" to 3Dfx Voodoo
50 module, the 3dfx takes control of the output, so you'll have to
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| /linux-6.12.1/drivers/pinctrl/intel/ |
| D | pinctrl-denverton.c | 78 /* South DFX */
230 DNV_GPP(0, 41, 58), /* South DFX */
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| /linux-6.12.1/drivers/video/fbdev/ |
| D | Kconfig | 1206 tristate "3Dfx Banshee/Voodoo3/Voodoo5 display support"
1214 This driver supports graphics boards with the 3Dfx Banshee,
1222 bool "3Dfx Acceleration functions"
1225 This will compile the 3Dfx Banshee/Voodoo3/VSA-100 frame buffer
1234 Say Y here if you want DDC/I2C support for your 3dfx Voodoo3.
1237 tristate "3Dfx Voodoo Graphics (sst1) support"
1241 Say Y here if you have a 3Dfx Voodoo Graphics (Voodoo1/sst1) or
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| D | tdfxfb.c | 21 * patches to the XF86 server, and the rest comes from the 3dfx
34 * While I _am_ grateful to 3Dfx for releasing the specs for Banshee,
1400 strcpy(info->fix.id, "3Dfx Banshee"); in tdfxfb_probe()
1404 strcpy(info->fix.id, "3Dfx Voodoo3"); in tdfxfb_probe()
1408 strcpy(info->fix.id, "3Dfx Voodoo5"); in tdfxfb_probe()
1654 MODULE_DESCRIPTION("3Dfx framebuffer device driver");
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| /linux-6.12.1/drivers/crypto/hisilicon/sec2/ |
| D | sec_crypto.c | 236 struct sec_dfx *dfx = &qp_ctx->ctx->sec->debug.dfx; in sec_req_cb() local
253 atomic64_inc(&dfx->err_bd_cnt); in sec_req_cb()
259 atomic64_inc(&dfx->invalid_req_cnt); in sec_req_cb()
268 atomic64_inc(&dfx->done_flag_cnt); in sec_req_cb()
270 atomic64_inc(&dfx->recv_cnt); in sec_req_cb()
292 atomic64_inc(&ctx->sec->debug.dfx.send_cnt); in sec_bd_send()
293 atomic64_inc(&ctx->sec->debug.dfx.send_busy_cnt); in sec_bd_send()
304 atomic64_inc(&ctx->sec->debug.dfx.send_cnt); in sec_bd_send()
1464 atomic64_inc(&ctx->sec->debug.dfx.recv_busy_cnt); in sec_skcipher_callback()
1740 atomic64_inc(&c->sec->debug.dfx.recv_busy_cnt); in sec_aead_callback()
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| D | sec_main.c | 292 /* define the SEC's dfx regs region and region length */
628 /* clear sec dfx regs */ in sec_debug_regs_clear()
846 struct sec_dfx *dfx = &sec->debug.dfx; in sec_core_debug_init() local
869 atomic64_t *data = (atomic64_t *)((uintptr_t)dfx + in sec_core_debug_init()
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| D | sec.h | 184 struct sec_dfx dfx; member
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| /linux-6.12.1/Documentation/admin-guide/media/ |
| D | bttv-cardlist.rst | 178 - STB TV PCI FM, Gateway P/N 6000704 (bt878), 3Dfx VoodooTV 100
290 - 3Dfx VoodooTV FM (Euro)
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| /linux-6.12.1/drivers/thermal/ |
| D | armada_thermal.c | 290 /* Clear DFX temperature IRQ cause */ in armada_enable_overheat_interrupt()
293 /* Enable DFX Temperature IRQ */ in armada_enable_overheat_interrupt()
298 /* Enable DFX server IRQ */ in armada_enable_overheat_interrupt()
541 * The overheat interrupt must be cleared by reading the DFX interrupt in armada_overheat_isr_thread()
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| /linux-6.12.1/drivers/platform/x86/intel/pmc/ |
| D | spt.c | 61 {"DFX", SPT_PMC_BIT_DFX},
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| /linux-6.12.1/drivers/crypto/hisilicon/ |
| D | debugfs.c | 117 /* define the QM's dfx regs region and region length */
1139 struct qm_dfx *dfx = &qm->debug.dfx; in hisi_qm_debug_init() local
1172 data = (atomic64_t *)((uintptr_t)dfx + qm_dfx_files[i].offset); in hisi_qm_debug_init()
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| /linux-6.12.1/drivers/platform/x86/ |
| D | pmc_atom.c | 117 {"DFX", BIT_DFX},
143 {"DFX", PMC_PSS_BIT_DFX},
|