Searched full:ddrpll (Results 1 – 15 of 15) sorted by relevance
| /linux-6.12.1/drivers/clk/zynq/ |
| D | clkc.c | 51 armpll, ddrpll, iopll, enumerator
240 cpu_parents[2] = clk_output_name[ddrpll]; in zynq_clk_setup()
245 periph_parents[3] = clk_output_name[ddrpll]; in zynq_clk_setup()
266 clks[ddrpll] = clk_register_mux(NULL, clk_output_name[ddrpll], in zynq_clk_setup()
325 clk_register_divider(NULL, "ddr2x_div", "ddrpll", 0, in zynq_clk_setup()
331 clk_register_divider(NULL, "ddr3x_div", "ddrpll", 0, in zynq_clk_setup()
338 clk_register_divider(NULL, "dci_div0", "ddrpll", 0, in zynq_clk_setup()
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| /linux-6.12.1/Documentation/devicetree/bindings/clock/ |
| D | calxeda.yaml | 59 ddrpll: ddrpll@108 {
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| D | zynq-7000.txt | 42 1: ddrpll
96 clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
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| D | nuvoton,ma35d1-clk.yaml | 36 A list of PLL operation mode corresponding to CAPLL, DDRPLL, APLL,
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| D | keystone-pll.txt | 2 a divider and a post divider. The additional PLL IPs like ARMPLL, DDRPLL
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| /linux-6.12.1/drivers/clk/nuvoton/ |
| D | clk-ma35d1-pll.c | 235 case DDRPLL: in ma35d1_clk_pll_recalc_rate()
267 case DDRPLL: in ma35d1_clk_pll_round_rate()
347 if (id == CAPLL || id == DDRPLL) in ma35d1_reg_clk_pll()
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| D | clk-ma35d1.c | 68 { .fw_name = "ddrpll", },
344 { .fw_name = "ddrpll", },
504 hws[DDRPLL] = ma35d1_reg_clk_pll(dev, DDRPLL, pllmode[1], "ddrpll", in ma35d1_clocks_probe()
551 hws[DDR0_GATE] = ma35d1_clk_gate(dev, "ddr0_gate", "ddrpll", in ma35d1_clocks_probe()
553 hws[DDR6_GATE] = ma35d1_clk_gate(dev, "ddr6_gate", "ddrpll", in ma35d1_clocks_probe()
897 hws[DDR_GATE] = ma35d1_clk_gate(dev, "ddr_gate", "ddrpll", in ma35d1_clocks_probe()
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| /linux-6.12.1/arch/arm/boot/dts/calxeda/ |
| D | ecx-common.dtsi | 145 ddrpll: ddrpll { label
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| /linux-6.12.1/drivers/gpu/drm/i915/soc/ |
| D | intel_dram.c | 71 u16 ddrpll; in ilk_mem_freq() local
73 ddrpll = intel_uncore_read16(&dev_priv->uncore, DDRMPLL1); in ilk_mem_freq()
74 switch (ddrpll & 0xff) { in ilk_mem_freq()
85 ddrpll & 0xff); in ilk_mem_freq()
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| /linux-6.12.1/drivers/clk/sifive/ |
| D | fu540-prci.h | 76 .name = "ddrpll",
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| D | fu740-prci.h | 92 .name = "ddrpll",
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| /linux-6.12.1/arch/arm64/boot/dts/nuvoton/ |
| D | ma35d1-som-256m.dts | 42 <&clk DDRPLL>,
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| D | ma35d1-iot-512m.dts | 42 <&clk DDRPLL>,
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| /linux-6.12.1/include/dt-bindings/clock/ |
| D | nuvoton,ma35d1-clk.h | 21 #define DDRPLL 10 macro
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| /linux-6.12.1/arch/arm/boot/dts/xilinx/ |
| D | zynq-7000.dtsi | 320 clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x",
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