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/linux-6.12.1/drivers/cpufreq/
Dkirkwood-cpufreq.c22 struct clk *ddr_clk; member
68 clk_set_parent(priv.powersave_clk, priv.ddr_clk); in kirkwood_cpufreq_target()
134 priv.ddr_clk = of_clk_get_by_name(np, "ddrclk"); in kirkwood_cpufreq_probe()
135 if (IS_ERR(priv.ddr_clk)) { in kirkwood_cpufreq_probe()
137 err = PTR_ERR(priv.ddr_clk); in kirkwood_cpufreq_probe()
141 err = clk_prepare_enable(priv.ddr_clk); in kirkwood_cpufreq_probe()
146 kirkwood_freq_table[1].frequency = clk_get_rate(priv.ddr_clk) / 1000; in kirkwood_cpufreq_probe()
172 clk_disable_unprepare(priv.ddr_clk); in kirkwood_cpufreq_probe()
186 clk_disable_unprepare(priv.ddr_clk); in kirkwood_cpufreq_remove()
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dmicrochip,lan966x-gck.yaml14 ddr_clk and sys_clk. This clock controller generates and supplies
56 clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>;
Dimx7ulp-pcc-clock.yaml67 - const: ddr_clk
106 clock-names = "nic1_bus_clk", "nic1_clk", "ddr_clk",
/linux-6.12.1/drivers/clk/imx/
Dclk-imx7ulp.c29 static const char * const nic_sels[] = { "firc", "ddr_clk", };
30 static const char * const periph_plat_sels[] = { "dummy", "nic1_bus_clk", "nic1_clk", "ddr_clk", "a…
115 …hws[IMX7ULP_CLK_DDR_DIV] = imx_clk_hw_divider_gate("ddr_clk", "ddr_sel", CLK_SET_RATE_PARENT | CLK… in imx7ulp_clk_scg1_init()
/linux-6.12.1/drivers/gpu/drm/i915/display/
Dvlv_dsi_pll.c384 u32 ddr_clk = 0; in glk_dsi_program_esc_clock() local
394 ddr_clk = dsi_rate / 2; in glk_dsi_program_esc_clock()
397 div1_value = DIV_ROUND_CLOSEST(ddr_clk, 20000); in glk_dsi_program_esc_clock()
/linux-6.12.1/arch/arm/boot/dts/microchip/
Dlan966x.dtsi50 ddr_clk: ddr_clk { label
66 clocks = <&cpu_clk>, <&ddr_clk>, <&sys_clk>;
/linux-6.12.1/drivers/clk/spear/
Dspear6xx_clock.c277 clk = clk_register_mux(NULL, "ddr_clk", ddr_parents, in spear6xx_clk_init()
280 clk_register_clkdev(clk, "ddr_clk", NULL); in spear6xx_clk_init()
Dspear3xx_clock.c558 clk = clk_register_mux(NULL, "ddr_clk", ddr_parents, in spear3xx_clk_init()
561 clk_register_clkdev(clk, "ddr_clk", NULL); in spear3xx_clk_init()
Dspear1310_clock.c483 clk = clk_register_fixed_factor(NULL, "ddr_clk", "pll4_clk", 0, 1, in spear1310_clk_init()
485 clk_register_clkdev(clk, "ddr_clk", NULL); in spear1310_clk_init()
Dspear1340_clock.c540 clk = clk_register_fixed_factor(NULL, "ddr_clk", "pll4_clk", 0, 1, in spear1340_clk_init()
542 clk_register_clkdev(clk, "ddr_clk", NULL); in spear1340_clk_init()
/linux-6.12.1/arch/arm/boot/dts/nxp/imx/
Dimx7ulp.dtsi282 clock-names = "nic1_bus_clk", "nic1_clk", "ddr_clk",
314 clock-names = "nic1_bus_clk", "nic1_clk", "ddr_clk",
/linux-6.12.1/arch/sh/kernel/cpu/sh4a/
Dclock-shx3.c108 CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_DDR]),
Dclock-sh7785.c125 CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_DDR]),
Dclock-sh7786.c133 CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_DDR]),
Dclock-sh7734.c186 CLKDEV_CON_ID("ddr_clk", &div4_clks[DIV4_M]),
/linux-6.12.1/arch/mips/lantiq/xway/
Dclk.c302 /* fpi clock is derived from ddr_clk */ in ltq_grx390_fpi_hz()
/linux-6.12.1/drivers/gpu/drm/omapdrm/dss/
Ddsi.c1025 seq_printf(s, "DDR_CLK\t\t%lu\n", in dsi_dump_dsi_clocks()
1332 unsigned long ddr_clk = dsi->pll.cinfo.clkdco / 4; in ns2ddr() local
1334 return (ns * (ddr_clk / 1000 / 1000) + 999) / 1000; in ns2ddr()
1339 unsigned long ddr_clk = dsi->pll.cinfo.clkdco / 4; in ddr2ns() local
1341 return ddr * 1000 * 1000 / (ddr_clk / 1000); in ddr2ns()
1353 /* 1 * DDR_CLK = 2 * UI */ in dsi_cio_timings()
/linux-6.12.1/drivers/video/fbdev/omap2/omapfb/dss/
Ddsi.c1512 seq_printf(s, "DDR_CLK\t\t%lu\n", in dsi_dump_dsidev_clocks()
1860 unsigned long ddr_clk = dsi->pll.cinfo.clkdco / 4; in ns2ddr() local
1861 return (ns * (ddr_clk / 1000 / 1000) + 999) / 1000; in ns2ddr()
1868 unsigned long ddr_clk = dsi->pll.cinfo.clkdco / 4; in ddr2ns() local
1869 return ddr * 1000 * 1000 / (ddr_clk / 1000); in ddr2ns()
1881 /* 1 * DDR_CLK = 2 * UI */ in dsi_cio_timings()
/linux-6.12.1/drivers/clk/actions/
Dowl-s700.c110 static const char *gpu_clk_mux_p[] = { "dev_clk", "display_pll", "nand_pll", "ddr_clk", "cvbs_pll"};
/linux-6.12.1/drivers/pinctrl/tegra/
Dpinctrl-tegra20.c622 PINCTRL_PIN(TEGRA_PIN_DDR_CLK, "DDR_CLK"),