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/linux-6.12.1/drivers/mailbox/
Dimx-mailbox.c97 const struct imx_mu_dcfg *dcfg; member
168 status = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_TSR]); in imx_mu_tx_waiting_write()
169 can_write = status & IMX_MU_xSR_TEn(priv->dcfg->type, idx % 4); in imx_mu_tx_waiting_write()
178 imx_mu_write(priv, val, priv->dcfg->xTR + (idx % 4) * 4); in imx_mu_tx_waiting_write()
192 status = imx_mu_read(priv, priv->dcfg->xSR[IMX_MU_RSR]); in imx_mu_rx_waiting_read()
193 can_read = status & IMX_MU_xSR_RFn(priv->dcfg->type, idx % 4); in imx_mu_rx_waiting_read()
202 *val = imx_mu_read(priv, priv->dcfg->xRR + (idx % 4) * 4); in imx_mu_rx_waiting_read()
214 val = imx_mu_read(priv, priv->dcfg->xCR[type]); in imx_mu_xcr_rmw()
217 imx_mu_write(priv, val, priv->dcfg->xCR[type]); in imx_mu_xcr_rmw()
233 imx_mu_write(priv, *arg, priv->dcfg->xTR + cp->idx * 4); in imx_mu_generic_tx()
[all …]
/linux-6.12.1/drivers/video/fbdev/geode/
Dvideo_cs5530.c98 u32 dcfg; in cs5530_configure_display() local
100 dcfg = readl(par->vid_regs + CS5530_DISPLAY_CONFIG); in cs5530_configure_display()
103 dcfg &= ~(CS5530_DCFG_CRT_SYNC_SKW_MASK | CS5530_DCFG_PWR_SEQ_DLY_MASK in cs5530_configure_display()
110 dcfg |= (CS5530_DCFG_CRT_SYNC_SKW_INIT | CS5530_DCFG_PWR_SEQ_DLY_INIT in cs5530_configure_display()
115 dcfg |= CS5530_DCFG_DAC_PWR_EN; in cs5530_configure_display()
116 dcfg |= CS5530_DCFG_HSYNC_EN | CS5530_DCFG_VSYNC_EN; in cs5530_configure_display()
120 dcfg |= CS5530_DCFG_FP_PWR_EN; in cs5530_configure_display()
121 dcfg |= CS5530_DCFG_FP_DATA_EN; in cs5530_configure_display()
126 dcfg |= CS5530_DCFG_CRT_HSYNC_POL; in cs5530_configure_display()
128 dcfg |= CS5530_DCFG_CRT_VSYNC_POL; in cs5530_configure_display()
[all …]
Ddisplay_gx.c60 u32 gcfg, dcfg; in gx_set_mode() local
68 dcfg = read_dc(par, DC_DISPLAY_CFG); in gx_set_mode()
71 dcfg &= ~DC_DISPLAY_CFG_TGEN; in gx_set_mode()
72 write_dc(par, DC_DISPLAY_CFG, dcfg); in gx_set_mode()
91 dcfg = 0; in gx_set_mode()
108 dcfg |= DC_DISPLAY_CFG_GDEN | DC_DISPLAY_CFG_VDEN | in gx_set_mode()
114 dcfg |= DC_DISPLAY_CFG_DISP_MODE_8BPP; in gx_set_mode()
117 dcfg |= DC_DISPLAY_CFG_DISP_MODE_16BPP; in gx_set_mode()
120 dcfg |= DC_DISPLAY_CFG_DISP_MODE_24BPP; in gx_set_mode()
121 dcfg |= DC_DISPLAY_CFG_PALB; in gx_set_mode()
[all …]
Dvideo_gx.c235 u32 dcfg, misc; in gx_configure_display() local
238 dcfg = read_vp(par, VP_DCFG); in gx_configure_display()
241 dcfg &= ~(VP_DCFG_VSYNC_EN | VP_DCFG_HSYNC_EN); in gx_configure_display()
242 write_vp(par, VP_DCFG, dcfg); in gx_configure_display()
245 dcfg &= ~(VP_DCFG_CRT_SYNC_SKW in gx_configure_display()
250 dcfg |= VP_DCFG_CRT_SYNC_SKW_DEFAULT; in gx_configure_display()
253 dcfg |= VP_DCFG_HSYNC_EN | VP_DCFG_VSYNC_EN; in gx_configure_display()
270 dcfg |= VP_DCFG_CRT_HSYNC_POL; in gx_configure_display()
272 dcfg |= VP_DCFG_CRT_VSYNC_POL; in gx_configure_display()
282 dcfg |= VP_DCFG_CRT_EN | VP_DCFG_DAC_BL_EN; in gx_configure_display()
[all …]
Dlxfb_ops.c348 unsigned int gcfg, dcfg; in lx_set_mode() local
437 dcfg = DC_DISPLAY_CFG_VDEN; /* Enable video data */ in lx_set_mode()
438 dcfg |= DC_DISPLAY_CFG_GDEN; /* Enable graphics */ in lx_set_mode()
439 dcfg |= DC_DISPLAY_CFG_TGEN; /* Turn on the timing generator */ in lx_set_mode()
440 dcfg |= DC_DISPLAY_CFG_TRUP; /* Update timings immediately */ in lx_set_mode()
441 dcfg |= DC_DISPLAY_CFG_PALB; /* Palette bypass in > 8 bpp modes */ in lx_set_mode()
442 dcfg |= DC_DISPLAY_CFG_VISL; in lx_set_mode()
443 dcfg |= DC_DISPLAY_CFG_DCEN; /* Always center the display */ in lx_set_mode()
449 dcfg |= DC_DISPLAY_CFG_DISP_MODE_8BPP; in lx_set_mode()
453 dcfg |= DC_DISPLAY_CFG_DISP_MODE_16BPP; in lx_set_mode()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/soc/fsl/
Dfsl,layerscape-dcfg.yaml4 $id: http://devicetree.org/schemas/soc/fsl/fsl,layerscape-dcfg.yaml#
13 DCFG is the device configuration unit, that provides general purpose
23 - fsl,ls1012a-dcfg
24 - fsl,ls1021a-dcfg
25 - fsl,ls1043a-dcfg
26 - fsl,ls1046a-dcfg
27 - fsl,ls1088a-dcfg
28 - fsl,ls2080a-dcfg
29 - fsl,lx2160a-dcfg
34 - fsl,ls1028a-dcfg
[all …]
/linux-6.12.1/drivers/nvmem/
Dsnvs_lpgpr.c36 const struct snvs_lpgpr_cfg *dcfg; member
57 const struct snvs_lpgpr_cfg *dcfg = priv->dcfg; in snvs_lpgpr_write() local
61 ret = regmap_read(priv->regmap, dcfg->offset_hplr, &lock_reg); in snvs_lpgpr_write()
68 ret = regmap_read(priv->regmap, dcfg->offset_lplr, &lock_reg); in snvs_lpgpr_write()
75 return regmap_bulk_write(priv->regmap, dcfg->offset + offset, val, in snvs_lpgpr_write()
83 const struct snvs_lpgpr_cfg *dcfg = priv->dcfg; in snvs_lpgpr_read() local
85 return regmap_bulk_read(priv->regmap, dcfg->offset + offset, in snvs_lpgpr_read()
97 const struct snvs_lpgpr_cfg *dcfg; in snvs_lpgpr_probe() local
106 dcfg = of_device_get_match_data(dev); in snvs_lpgpr_probe()
107 if (!dcfg) in snvs_lpgpr_probe()
[all …]
/linux-6.12.1/drivers/remoteproc/
Dimx_rproc.c102 const struct imx_rproc_dcfg *dcfg; member
369 const struct imx_rproc_dcfg *dcfg = priv->dcfg; in imx_rproc_start() local
378 switch (dcfg->method) { in imx_rproc_start()
381 ret = regmap_clear_bits(priv->gpr, dcfg->gpr_reg, in imx_rproc_start()
382 dcfg->gpr_wait); in imx_rproc_start()
384 ret = regmap_update_bits(priv->regmap, dcfg->src_reg, in imx_rproc_start()
385 dcfg->src_mask, in imx_rproc_start()
386 dcfg->src_start); in imx_rproc_start()
409 const struct imx_rproc_dcfg *dcfg = priv->dcfg; in imx_rproc_stop() local
414 switch (dcfg->method) { in imx_rproc_stop()
[all …]
Dimx_dsp_rproc.c131 * @dcfg: imx_rproc_dcfg handler
135 const struct imx_rproc_dcfg *dcfg; member
244 .dcfg = &dsp_rproc_cfg_imx8mp,
260 .dcfg = &dsp_rproc_cfg_imx8ulp,
272 .dcfg = &dsp_rproc_cfg_imx8qxp,
283 .dcfg = &dsp_rproc_cfg_imx8qm,
315 const struct imx_rproc_dcfg *dcfg = dsp_dcfg->dcfg; in imx_dsp_rproc_start() local
319 switch (dcfg->method) { in imx_dsp_rproc_start()
322 dcfg->src_reg, in imx_dsp_rproc_start()
323 dcfg->src_mask, in imx_dsp_rproc_start()
[all …]
Dimx_rproc.h29 /* dcfg flags */
/linux-6.12.1/drivers/soc/fsl/
Dguts.c170 { .compatible = "fsl,ls1021a-dcfg", },
171 { .compatible = "fsl,ls1043a-dcfg", },
172 { .compatible = "fsl,ls2080a-dcfg", },
173 { .compatible = "fsl,ls1088a-dcfg", },
174 { .compatible = "fsl,ls1012a-dcfg", },
175 { .compatible = "fsl,ls1046a-dcfg", },
176 { .compatible = "fsl,lx2160a-dcfg", },
177 { .compatible = "fsl,ls1028a-dcfg", .data = &ls1028a_data},
/linux-6.12.1/drivers/net/ethernet/intel/ixgbe/
Dixgbe_dcb_nl.c24 struct ixgbe_dcb_config *dcfg = &adapter->dcb_cfg; in ixgbe_copy_dcb_cfg() local
44 dst = &dcfg->tc_config[i - DCB_PG_ATTR_TC_0]; in ixgbe_copy_dcb_cfg()
93 if (dcfg->bw_percentage[tx][j] != scfg->bw_percentage[tx][j]) { in ixgbe_copy_dcb_cfg()
94 dcfg->bw_percentage[tx][j] = scfg->bw_percentage[tx][j]; in ixgbe_copy_dcb_cfg()
97 if (dcfg->bw_percentage[rx][j] != scfg->bw_percentage[rx][j]) { in ixgbe_copy_dcb_cfg()
98 dcfg->bw_percentage[rx][j] = scfg->bw_percentage[rx][j]; in ixgbe_copy_dcb_cfg()
105 if (dcfg->tc_config[j].dcb_pfc != scfg->tc_config[j].dcb_pfc) { in ixgbe_copy_dcb_cfg()
106 dcfg->tc_config[j].dcb_pfc = scfg->tc_config[j].dcb_pfc; in ixgbe_copy_dcb_cfg()
111 if (dcfg->pfc_mode_enable != scfg->pfc_mode_enable) { in ixgbe_copy_dcb_cfg()
112 dcfg->pfc_mode_enable = scfg->pfc_mode_enable; in ixgbe_copy_dcb_cfg()
/linux-6.12.1/drivers/iio/adc/
Dti-tsc2046.c144 const struct tsc2046_adc_dcfg *dcfg; member
746 const struct tsc2046_adc_dcfg *dcfg; in tsc2046_adc_probe() local
759 dcfg = spi_get_device_match_data(spi); in tsc2046_adc_probe()
760 if (!dcfg) in tsc2046_adc_probe()
775 priv->dcfg = dcfg; in tsc2046_adc_probe()
781 indio_dev->channels = dcfg->channels; in tsc2046_adc_probe()
782 indio_dev->num_channels = dcfg->num_channels; in tsc2046_adc_probe()
/linux-6.12.1/drivers/media/pci/pt1/
Dpt1.c971 struct tc90522_config dcfg; in pt1_init_frontends() local
975 dcfg = pt1_configs[i].demod_cfg; in pt1_init_frontends()
976 dcfg.tuner_i2c = NULL; in pt1_init_frontends()
980 info->addr, &dcfg); in pt1_init_frontends()
991 tcfg.fe = dcfg.fe; in pt1_init_frontends()
993 info->type, dcfg.tuner_i2c, in pt1_init_frontends()
1000 tcfg.fe = dcfg.fe; in pt1_init_frontends()
1002 info->type, dcfg.tuner_i2c, in pt1_init_frontends()
1009 ret = pt1_init_frontend(pt1->adaps[i], dcfg.fe); in pt1_init_frontends()
/linux-6.12.1/drivers/net/ethernet/atheros/
Dag71xx.c362 const struct ag71xx_dcfg *dcfg; member
402 return ag->dcfg->type == type; in ag71xx_is()
792 if (ag->dcfg->tx_hang_workaround && in ag71xx_tx_packets()
1520 skb->len & ag->dcfg->desc_pktlen_mask); in ag71xx_hard_start_xmit()
1605 pktlen_mask = ag->dcfg->desc_pktlen_mask; in ag71xx_rx_packets()
1790 const struct ag71xx_dcfg *dcfg; in ag71xx_probe() local
1808 dcfg = of_device_get_match_data(&pdev->dev); in ag71xx_probe()
1809 if (!dcfg) in ag71xx_probe()
1834 ag->dcfg = dcfg; in ag71xx_probe()
1836 memcpy(ag->fifodata, dcfg->fifodata, sizeof(ag->fifodata)); in ag71xx_probe()
[all …]
/linux-6.12.1/drivers/usb/dwc2/
Dgadget.c1937 u32 dcfg; in dwc2_hsotg_process_control() local
1959 dcfg = dwc2_readl(hsotg, DCFG); in dwc2_hsotg_process_control()
1960 dcfg &= ~DCFG_DEVADDR_MASK; in dwc2_hsotg_process_control()
1961 dcfg |= (le16_to_cpu(ctrl->wValue) << in dwc2_hsotg_process_control()
1963 dwc2_writel(hsotg, dcfg, DCFG); in dwc2_hsotg_process_control()
3390 u32 dcfg = 0; in dwc2_hsotg_core_init_disconnected() local
3433 dcfg |= DCFG_EPMISCNT(1); in dwc2_hsotg_core_init_disconnected()
3437 dcfg |= DCFG_DEVSPD_LS; in dwc2_hsotg_core_init_disconnected()
3441 dcfg |= DCFG_DEVSPD_FS48; in dwc2_hsotg_core_init_disconnected()
3443 dcfg |= DCFG_DEVSPD_FS; in dwc2_hsotg_core_init_disconnected()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dfsl,flexspi-clock.yaml44 dcfg {
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dfsl-ls1012a.dtsi101 regmap = <&dcfg>;
288 dcfg: dcfg@1ee0000 { label
289 compatible = "fsl,ls1012a-dcfg",
Dfsl-ls1046a.dtsi119 regmap = <&dcfg>;
426 dcfg: dcfg@1ee0000 { label
427 compatible = "fsl,ls1046a-dcfg", "syscon";
Dfsl-ls1043a.dtsi151 regmap = <&dcfg>;
399 dcfg: dcfg@1ee0000 { label
400 compatible = "fsl,ls1043a-dcfg", "syscon";
/linux-6.12.1/drivers/staging/media/deprecated/atmel/
Datmel-isc.h193 * @dcfg: DMA master configuration, architecture dependent
269 u32 dcfg; member
/linux-6.12.1/drivers/media/platform/microchip/
Dmicrochip-isc.h205 * @dcfg: DMA master configuration, architecture dependent
287 u32 dcfg; member
/linux-6.12.1/arch/arm/mach-imx/
Dplatsmp.c136 np = of_find_compatible_node(NULL, NULL, "fsl,ls1021a-dcfg"); in ls1021a_smp_prepare_cpus()
/linux-6.12.1/arch/arm/boot/dts/nxp/ls/
Dls1021a.dtsi79 regmap = <&dcfg>;
139 dcfg: dcfg@1ee0000 { label
140 compatible = "fsl,ls1021a-dcfg", "syscon";
/linux-6.12.1/sound/soc/qcom/qdsp6/
Dq6afe.c1133 struct afe_digital_clk_cfg dcfg = {0,}; in q6afe_port_set_sysclk() local
1138 dcfg.i2s_cfg_minor_version = AFE_API_VERSION_I2S_CONFIG; in q6afe_port_set_sysclk()
1139 dcfg.clk_val = freq; in q6afe_port_set_sysclk()
1140 dcfg.clk_root = clk_root; in q6afe_port_set_sysclk()
1141 ret = q6afe_set_digital_codec_core_clock(port, &dcfg); in q6afe_port_set_sysclk()

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