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/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dbrcm,iproc-clocks.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/brcm,iproc-clocks.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ray Jui <rjui@broadcom.com>
11 - Scott Branden <sbranden@broadcom.com>
15 An SoC from the iProc family may have several PLLs, e.g., ARMPLL, GENPLL,
25 - brcm,bcm63138-armpll
26 - brcm,cygnus-armpll
27 - brcm,cygnus-genpll
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/linux-6.12.1/arch/arm/boot/dts/broadcom/
Dbcm-cygnus-clock.dtsi34 #address-cells = <1>;
35 #size-cells = <1>;
39 #clock-cells = <0>;
40 compatible = "fixed-clock";
41 clock-frequency = <25000000>;
44 /* Cygnus ARM PLL */
46 #clock-cells = <0>;
47 compatible = "brcm,cygnus-armpll";
54 #clock-cells = <0>;
55 compatible = "fixed-factor-clock";
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Dbcm-nsp.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-nsp.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <0>;
58 compatible = "arm,cortex-a9";
59 next-level-cache = <&L2>;
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/linux-6.12.1/drivers/clk/bcm/
Dclk-cygnus.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/bcm-cygnus.h>
14 #include "clk-iproc.h"
45 CLK_OF_DECLARE(cygnus_armpll, "brcm,cygnus-armpll", cygnus_armpll_init);
47 static const struct iproc_pll_ctrl genpll = { variable
102 iproc_pll_clk_setup(node, &genpll, NULL, 0, genpll_clk, in cygnus_genpll_clk_init()
105 CLK_OF_DECLARE(cygnus_genpll, "brcm,cygnus-genpll", cygnus_genpll_clk_init);
163 CLK_OF_DECLARE(cygnus_lcpll0, "brcm,cygnus-lcpll0", cygnus_lcpll0_clk_init);
242 CLK_OF_DECLARE(cygnus_mipipll, "brcm,cygnus-mipipll", cygnus_mipipll_clk_init);
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