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/linux-6.12.1/arch/arm/include/asm/
Dcti.h41 * struct cti - cross trigger interface struct
42 * @base: mapped virtual address for the cti base
43 * @irq: irq number for the cti
47 * cti struct used to operate cti registers.
49 struct cti { struct
56 * cti_init - initialize the cti instance argument
57 * @cti: cti instance
58 * @base: mapped virtual address for the cti base
59 * @irq: irq number for the cti
64 * @base, @irq and @trig_out to cti.
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/linux-6.12.1/Documentation/devicetree/bindings/arm/
Darm,coresight-cti.yaml5 $id: http://devicetree.org/schemas/arm/arm,coresight-cti.yaml#
8 title: ARM Coresight Cross Trigger Interface (CTI) device.
11 The CoreSight Embedded Cross Trigger (ECT) consists of CTI devices connected
17 The CTI component properties define the connections between the individual
18 CTI and the components it is directly connected to, consisting of input and
20 output hardware trigger signals (8 each for v1 CTI, 32 each for v2 CTI). The
30 In general the connections between CTI and components via the trigger signals
31 are implementation defined, except when the CTI is connected to an ARM v8
35 between CTI and the CPU core and ETM if present. In the case of a v8
36 architecturally connected CTI an additional compatible string is used to
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/linux-6.12.1/Documentation/ABI/testing/
Dsysfs-bus-coresight-devices-cti1 What: /sys/bus/coresight/devices/<cti-name>/enable
5 Description: (RW) Enable/Disable the CTI hardware.
7 What: /sys/bus/coresight/devices/<cti-name>/powered
11 Description: (Read) Indicate if the CTI hardware is powered.
13 What: /sys/bus/coresight/devices/<cti-name>/ctmid
19 What: /sys/bus/coresight/devices/<cti-name>/nr_trigger_cons
23 Description: (Read) Number of devices connected to triggers on this CTI
25 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/name
31 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_signals
37 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_types
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/linux-6.12.1/arch/arm64/boot/dts/hisilicon/
Dhi6220-coresight.dtsi369 /* CTI 0 - TMC and TPIU connections */
370 cti@f6403000 {
371 compatible = "arm,coresight-cti", "arm,primecell";
378 /* CTI - CPU-0 */
379 cti@f6598000 {
380 compatible = "arm,coresight-cti-v8-arch",
381 "arm,coresight-cti", "arm,primecell";
391 /* CTI - CPU-1 */
392 cti@f6599000 {
393 compatible = "arm,coresight-cti-v8-arch",
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/linux-6.12.1/drivers/hwtracing/coresight/
Dcoresight-cti.h22 * 0x000 - 0x144: CTI programming and status
23 * 0xEDC - 0xEF8: CTI integration test.
26 /* CTI programming registers */
41 #define ITCHINACK 0xEDC /* WO CTI CSSoc 400 only*/
42 #define ITTRIGINACK 0xEE0 /* WO CTI CSSoc 400 only*/
45 #define ITCHOUTACK 0xEEC /* RO CTI CSSoc 400 only*/
46 #define ITTRIGOUTACK 0xEF0 /* RO CTI CSSoc 400 only*/
54 * CTI CSSoc 600 has a max of 32 trigger signals per direction.
55 * CTI CSSoc 400 has 8 IO triggers - other CTIs can be impl def.
75 * Trigger connection - connection between a CTI and other (coresight) device
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Dcoresight-cti-core.c23 #include "coresight-cti.h"
26 * CTI devices can be associated with a PE, or be connected to CoreSight
36 /* net of CTI devices connected via CTM */
52 * CTI naming. CTI bound to cores will have the name cti_cpu<N> where
56 * CTI device name list - for CTI not bound to cores.
68 /* disable CTI before writing registers */ in cti_write_all_hw_regs()
71 /* write the CTI trigger registers */ in cti_write_all_hw_regs()
83 /* re-enable CTI */ in cti_write_all_hw_regs()
123 /* re-enable CTI on CPU when using CPU hotplug */
174 /* disable CTI */ in cti_disable_hw()
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Dcoresight-cti-platform.c12 #include <dt-bindings/arm/coresight-cti-dt.h>
14 #include "coresight-cti.h"
17 /* Number of CTI signals in the v8 architecturally defined connection */
22 /* CTI device tree trigger connection node keyword */
25 /* CTI device tree connection property keywords */
26 #define CTI_DT_V8ARCH_COMPAT "arm,coresight-cti-v8-arch"
34 #define CTI_DT_CTM_ID "arm,cti-ctm-id"
38 * CTI can be bound to a CPU, or a system device.
51 /* CTI affinity defaults to no cpu */ in of_cti_get_cpu_at_node()
70 * CTI can be bound to a CPU, or a system device.
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DMakefile46 obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o
50 coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \
51 coresight-cti-sysfs.o
DKconfig167 tristate "CoreSight Cross Trigger Interface (CTI) driver"
170 This driver provides support for CoreSight CTI and CTM components.
173 inject events into the trace stream. CTI also provides a software
179 module will be called coresight-cti.
182 bool "Access CTI CoreSight Integration Registers"
187 CTI trigger connections between this and other devices.These
Dcoresight-cti-sysfs.c15 #include "coresight-cti.h"
25 * include\dt-bindings\arm\coresight-cti-dt.h
254 /* CTI low level programming registers */
308 /* Standard macro for simple rw cti config registers */
533 /* CTI channel x-trigger programming */
733 /* clear the CTI trigger / channel programming registers */ in chan_xtrigs_reset_store()
1122 /* create the array of group pointers for the CTI sysfs groups */
Dcoresight-tpdm.h33 /* CMB CTI timestamp request */
257 * @trig_ts: Indicates if CTI trigger for timestamp is enabled.
Dcoresight-config.h66 * @hw_info: optional hardware device type specific information. (ETM / CTI specific etc)
/linux-6.12.1/Documentation/trace/coresight/
Dcoresight-ect.rst4 CoreSight Embedded Cross Trigger (CTI & CTM).
13 The CoreSight Cross Trigger Interface (CTI) is a hardware device that takes
21 0 C 0----------->: : +======>(other CTI channel IO)
24 0000000 : CTI :<=========>*CTM*<====>: CTI :---+
30 The CTI driver enables the programming of the CTI to attach triggers to
34 activating connected output triggers there, unless filtered by the CTI
38 programming registers in the CTI.
53 All the CTI devices are associated with a CTM. On many systems there will be a
57 CTI devices that are interconnected via a given CTM.
62 The CTI devices appear on the existing CoreSight bus alongside the other
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Dcoresight.rst65 |-->:: CTI ::<!! === N ===
78 ; CTI = Cross Trigger Interface
91 intricate IP blocks such as STM and CTI.
115 CTI:
127 CTI
251 which CTI devices are connected to a given component. This directory contains a
258 <file details> cti_cpu0 -> ../../../23020000.cti/cti_cpu0
284 <file details> cti_sys0 -> ../../../20020000.cti/cti_sys0
308 <file details> cti_sys0 -> ../../../20020000.cti/cti_sys0
663 The CTI & CTM Modules
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Dcoresight-config.rst19 the cross trigger components such as CTI and CTM. These system settings can
83 specific CTI on the system.
/linux-6.12.1/tools/perf/pmu-events/arch/arm64/arm/neoverse-n2-v2/
Dtrace.json24 …"PublicDescription": "This event is generated each time an event is signaled on CTI output trigger…
28 …"PublicDescription": "This event is generated each time an event is signaled on CTI output trigger…
32 …"PublicDescription": "This event is generated each time an event is signaled on CTI output trigger…
36 …"PublicDescription": "This event is generated each time an event is signaled on CTI output trigger…
/linux-6.12.1/arch/arm64/boot/dts/arm/
Djuno-base.dtsi293 cti0: cti@22020000 {
294 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
365 cti1: cti@22120000 {
366 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
402 cti2: cti@23020000 {
403 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
486 cti3: cti@23120000 {
487 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
523 cti4: cti@23220000 {
524 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
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Djuno-cs-r1r2.dtsi84 cti_sys2: cti@20160000 { /* sys_cti_2 */
85 compatible = "arm,coresight-cti", "arm,primecell";
/linux-6.12.1/arch/sparc/kernel/
Dsyscalls.S218 bgeu,pn %xcc, linux_sparc_ni_syscall ! CTI
229 bne,pn %icc, linux_syscall_trace32 ! CTI
231 5: call %l7 ! CTI Group brk forced
242 bgeu,pn %xcc, linux_sparc_ni_syscall ! CTI
253 bne,pn %icc, linux_syscall_trace ! CTI Group
255 2: call %l7 ! CTI Group brk forced
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsm6115.dtsi2081 cti0: cti@8010000 {
2082 compatible = "arm,coresight-cti", "arm,primecell";
2091 cti1: cti@8011000 {
2092 compatible = "arm,coresight-cti", "arm,primecell";
2101 cti2: cti@8012000 {
2102 compatible = "arm,coresight-cti", "arm,primecell";
2111 cti3: cti@8013000 {
2112 compatible = "arm,coresight-cti", "arm,primecell";
2121 cti4: cti@8014000 {
2122 compatible = "arm,coresight-cti", "arm,primecell";
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Dmsm8916.dtsi6 #include <dt-bindings/arm/coresight-cti-dt.h>
603 /* CTI 0 - TMC connections */
604 cti0: cti@810000 {
605 compatible = "arm,coresight-cti", "arm,primecell";
614 /* CTI 1 - TPIU connections */
615 cti1: cti@811000 {
616 compatible = "arm,coresight-cti", "arm,primecell";
858 /* CTI - CPU-0 */
859 cti12: cti@858000 {
860 compatible = "arm,coresight-cti-v8-arch", "arm,coresight-cti",
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/linux-6.12.1/drivers/media/i2c/
Dadv7183_regs.h57 #define ADV7183_CTI_DNR_CTRL_1 0x4D /* CTI DNR ctrl 1 */
58 #define ADV7183_CTI_DNR_CTRL_2 0x4E /* CTI DNR ctrl 2 */
59 #define ADV7183_CTI_DNR_CTRL_4 0x50 /* CTI DNR ctrl 4 */
/linux-6.12.1/include/dt-bindings/arm/
Dcoresight-cti-dt.h4 * types on CoreSight CTI.
/linux-6.12.1/drivers/tty/serial/8250/
D8250_exar.c180 /* CTI EEPROM offsets */
204 * CTI Serial port line types. These match the values stored in the first
205 * nibble of the CTI EEPROM port_flags word.
671 * Some older CTI cards require MPIO_0 to be set low to enable the
692 * CTI XR17x15X and XR17V25X cards have the serial boards oscillator frequency
721 * CTI xr17c15x and xr17v25x based cards port types are based on PCI IDs.
792 * cti_get_port_type_fpga() - Get the port type of a CTI FPGA card
822 * CTI XR17V35X based cards have the port types stored in the EEPROM.
1487 // Handle CTI FPGA cards in exar_get_nr_ports()
/linux-6.12.1/Documentation/devicetree/bindings/interrupt-controller/
Dst,stih407-irq-syscfg.yaml13 On STi based systems; External, CTI (Core Sight), PMU (Performance

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