Searched +full:cti +full:- +full:ctm +full:- +full:id (Results 1 – 7 of 7) sorted by relevance
1 .. SPDX-License-Identifier: GPL-2.04 CoreSight Embedded Cross Trigger (CTI & CTM).11 --------------------13 The CoreSight Cross Trigger Interface (CTI) is a hardware device that takes15 devices and interconnects them via the Cross Trigger Matrix (CTM) to other21 0 C 0----------->: : +======>(other CTI channel IO)22 0 P 0<-----------: : v24 0000000 : CTI :<=========>*CTM*<====>: CTI :---+25 ####### in_trigs : : (id 0-3) ***** ::::::: v26 # ETM #----------->: : ^ #######[all …]
2 Coresight - HW Assisted Tracing on ARM9 ------------38 0 CPU 0<-->: C : 0 CPU 0<-->: C : : C : @ STM @ || System ||39 |->0000000 : T : |->0000000 : T : : T :<--->@@@@@ || Memory ||40 | #######<-->: I : | #######<-->: I : : I : @@@<-| ||||||||||||43 | |->### | ! | |->### | ! | ! . | || DAP ||49 *****************************************************************<-|55 ******************** Cross Trigger Matrix (CTM) *******************63 | * ===== F =====<---------|65 |-->:: CTI ::<!! === N ===[all …]
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause4 ---5 $id: http://devicetree.org/schemas/arm/arm,coresight-cti.yaml#6 $schema: http://devicetree.org/meta-schemas/core.yaml#8 title: ARM Coresight Cross Trigger Interface (CTI) device.11 The CoreSight Embedded Cross Trigger (ECT) consists of CTI devices connected13 a star topology via the Cross Trigger Matrix (CTM), which is not programmable.17 The CTI component properties define the connections between the individual18 CTI and the components it is directly connected to, consisting of input and20 output hardware trigger signals (8 each for v1 CTI, 32 each for v2 CTI). The[all …]
1 /* SPDX-License-Identifier: GPL-2.0 */18 #include "coresight-priv.h"22 * 0x000 - 0x144: CTI programming and status23 * 0xEDC - 0xEF8: CTI integration test.24 * 0xF00 - 0xFFC: Coresight management registers.26 /* CTI programming registers */41 #define ITCHINACK 0xEDC /* WO CTI CSSoc 400 only*/42 #define ITTRIGINACK 0xEE0 /* WO CTI CSSoc 400 only*/43 #define ITCHOUT 0xEE4 /* WO RW-600 */44 #define ITTRIGOUT 0xEE8 /* WO RW-600 */[all …]
1 // SPDX-License-Identifier: GPL-2.012 #include <dt-bindings/arm/coresight-cti-dt.h>14 #include "coresight-cti.h"15 #include "coresight-priv.h"17 /* Number of CTI signals in the v8 architecturally defined connection */22 /* CTI device tree trigger connection node keyword */23 #define CTI_DT_CONNS "trig-conns"25 /* CTI device tree connection property keywords */26 #define CTI_DT_V8ARCH_COMPAT "arm,coresight-cti-v8-arch"27 #define CTI_DT_CSDEV_ASSOC "arm,cs-dev-assoc"[all …]
1 // SPDX-License-Identifier: GPL-2.022 #include "coresight-priv.h"23 #include "coresight-cti.h"26 * CTI devices can be associated with a PE, or be connected to CoreSight30 * We assume that the non-CPU CTIs are always powered as we do with sinks etc.33 * the same CTM, in general this is the case but does not always have to be.36 /* net of CTI devices connected via CTM */43 dev_get_drvdata(csdev->dev.parent)52 * CTI naming. CTI bound to cores will have the name cti_cpu<N> where53 * N is the CPU ID. System CTIs will have the name cti_sys<I> where I[all …]
1 What: /sys/bus/coresight/devices/<cti-name>/enable5 Description: (RW) Enable/Disable the CTI hardware.7 What: /sys/bus/coresight/devices/<cti-name>/powered11 Description: (Read) Indicate if the CTI hardware is powered.13 What: /sys/bus/coresight/devices/<cti-name>/ctmid17 Description: (Read) Display the associated CTM ID19 What: /sys/bus/coresight/devices/<cti-name>/nr_trigger_cons23 Description: (Read) Number of devices connected to triggers on this CTI25 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/name31 What: /sys/bus/coresight/devices/<cti-name>/triggers<N>/in_signals[all …]