Searched +full:cros +full:- +full:ec +full:- +full:spi +full:- +full:pre +full:- +full:delay (Results 1 – 5 of 5) sorted by relevance
| /linux-6.12.1/Documentation/devicetree/bindings/mfd/ |
| D | google,cros-ec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/google,cros-ec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Benson Leung <bleung@chromium.org>
11 - Guenter Roeck <groeck@chromium.org>
14 Google's ChromeOS EC is a microcontroller which talks to the AP and
16 The EC can be connected through various interfaces (I2C, SPI, and others)
22 - description:
23 For implementations of the EC connected through I2C.
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| /linux-6.12.1/arch/arm/boot/dts/rockchip/ |
| D | rk3288-veyron-chromebook.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/clock/rockchip,rk808.h>
10 #include <dt-bindings/input/input.h>
11 #include "rk3288-veyron.dtsi"
12 #include "rk3288-veyron-analog-audio.dtsi"
13 #include "rk3288-veyron-edp.dtsi"
14 #include "rk3288-veyron-sdmmc.dtsi"
22 gpio-charger {
23 compatible = "gpio-charger";
24 charger-type = "mains";
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| /linux-6.12.1/drivers/platform/chrome/ |
| D | cros_ec_spi.c | 1 // SPDX-License-Identifier: GPL-2.0
2 // SPI interface for ChromeOS Embedded Controller
6 #include <linux/delay.h>
14 #include <linux/spi/spi.h>
23 * Number of EC preamble bytes we read at a time. Since it takes
24 * about 400-500us for the EC to respond there is not a lot of
25 * point in tuning this. If the EC could respond faster then
28 * SPI transfer size is 256 bytes, so at 5MHz we need a response
34 * Allow for a long time for the EC to respond. We support i2c
50 * for this, clocking in at 2-3ms.
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| /linux-6.12.1/include/linux/platform_data/ |
| D | cros_ec_commands.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Host communication command constants for ChromeOS EC
7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from
8 * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h
11 /* Host communication command constants for Chrome EC */
52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
56 * MEC series EC; an attempt to address a larger region may fail.
63 /* EC command register bit functions */
65 #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */
66 #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */
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| /linux-6.12.1/ |
| D | MAINTAINERS | 5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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