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/linux-6.12.1/Documentation/admin-guide/thermal/
Dintel_powerclamp.rst6 - Arjan van de Ven <arjan@linux.intel.com>
7 - Jacob Pan <jacob.jun.pan@linux.intel.com>
12 - Goals and Objectives
15 - Idle Injection
16 - Calibration
19 - Effectiveness and Limitations
20 - Power vs Performance
21 - Scalability
22 - Calibration
23 - Comparison with Alternative Techniques
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/s390/cf_z13/
Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi…
17 "Unit": "CPU-M-CF",
21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB1 One-Megabyte Page Writes",
28 …": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer for a on…
[all …]
/linux-6.12.1/Documentation/translations/zh_CN/mm/
Dmmu_notifier.rst28 - 上页表锁
29 - 清除页表项并通知 ([pmd/pte]p_huge_clear_flush_notify())
30 - 设置页表项以指向新页
37 两个地址addrA和addrB,这样|addrA - addrB| >= PAGE_SIZE,我们假设它们是COW的
42 [Time N] --------------------------------------------------------------------
43 CPU-thread-0 {尝试写到addrA}
44 CPU-thread-1 {尝试写到addrB}
45 CPU-thread-2 {}
46 CPU-thread-3 {}
47 DEV-thread-0 {读取addrA并填充设备TLB}
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/graniterapids/
Duncore-io.json4 "Counter": "0,1,2,3",
13 "Counter": "0,1,2,3",
25 "Counter": "0,1,2,3",
37 "Counter": "0,1,2,3",
49 "Counter": "0,1,2,3",
61 "Counter": "0,1,2,3",
73 "Counter": "0,1,2,3",
85 "Counter": "0,1,2,3",
97 "Counter": "0,1,2,3",
109 "Counter": "0,1,2,3",
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/sierraforest/
Duncore-io.json4 "Counter": "0,1,2,3",
13 "Counter": "0,1,2,3",
25 "Counter": "0,1,2,3",
37 "Counter": "0,1,2,3",
49 "Counter": "0,1,2,3",
61 "Counter": "0,1,2,3",
73 "Counter": "0,1,2,3",
85 "Counter": "0,1,2,3",
97 "Counter": "0,1,2,3",
109 "Counter": "0,1,2,3",
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/grandridge/
Duncore-io.json4 "Counter": "0,1,2,3",
13 "Counter": "0,1,2,3",
25 "Counter": "0,1,2,3",
37 "Counter": "0,1,2,3",
49 "Counter": "0,1,2,3",
61 "Counter": "0,1,2,3",
73 "Counter": "0,1,2,3",
85 "Counter": "0,1,2,3",
97 "Counter": "0,1,2,3",
109 "Counter": "0,1,2,3",
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/linux-6.12.1/include/trace/events/
Dcpuhp.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 TP_PROTO(unsigned int cpu,
17 TP_ARGS(cpu, target, idx, fun),
20 __field( unsigned int, cpu )
27 __entry->cpu = cpu;
28 __entry->target = target;
29 __entry->idx = idx;
30 __entry->fun = fun;
33 TP_printk("cpu: %04u target: %3d step: %3d (%ps)",
34 __entry->cpu, __entry->target, __entry->idx, __entry->fun)
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/linux-6.12.1/tools/perf/pmu-events/arch/s390/cf_z14/
Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/s390/cf_z15/
Dextended.json3 "Unit": "CPU-M-CF",
6 "BriefDescription": "L1D Read-only Exclusive Writes",
7 …blicDescription": "A directory write to the Level-1 Data cache where the line was originally in a …
10 "Unit": "CPU-M-CF",
17 "Unit": "CPU-M-CF",
21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this …
24 "Unit": "CPU-M-CF",
27 "BriefDescription": "DTLB2 One-Megabyte Page Writes",
28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page…
31 "Unit": "CPU-M-CF",
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/
Dnuma.txt6 1 - Introduction
18 2 - numa-node-id
23 a node id is a 32-bit integer.
26 numa-node-id property which contains the node id of the device.
30 numa-node-id = <0>;
33 numa-node-id = <1>;
36 3 - distance-map
39 The optional device tree node distance-map describes the relative
42 - compatible : Should at least contain "numa-distance-map-v1".
44 - distance-matrix
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/emeraldrapids/
Duncore-io.json24 "Counter": "3",
164 "Counter": "0,1,2,3",
182 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
183 "Counter": "0,1,2,3",
190 "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0-7",
196 "Counter": "0,1,2,3",
203 …serts of completions with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
209 "Counter": "0,1,2,3",
216 …serts of completions with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
222 "Counter": "0,1,2,3",
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/sapphirerapids/
Duncore-io.json24 "Counter": "3",
164 "Counter": "0,1,2,3",
182 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
183 "Counter": "0,1,2,3",
190 "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0-7",
196 "Counter": "0,1,2,3",
203 …serts of completions with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
209 "Counter": "0,1,2,3",
216 …serts of completions with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
222 "Counter": "0,1,2,3",
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/linux-6.12.1/tools/perf/pmu-events/arch/s390/cf_zec12/
Dextended.json3 "Unit": "CPU-M-CF",
7 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB…
10 "Unit": "CPU-M-CF",
14 …"PublicDescription": "Level-1 Instruction TLB miss in progress. Incremented by one for every cycle…
17 "Unit": "CPU-M-CF",
21 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
24 "Unit": "CPU-M-CF",
28 … "A directory write to the Level-1 Instruction cache directory where the returned cache line was s…
31 "Unit": "CPU-M-CF",
35 …on": "A directory write to the Level-1 Data cache directory where the returned cache line was sour…
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/linux-6.12.1/Documentation/mm/
Dmmu_notifier.rst8 For secondary TLB (non CPU TLB) like IOMMU TLB or device TLB (when device use
9 thing like ATS/PASID to get the IOMMU to walk the CPU page table to access a
23 - take page table lock
24 - clear page table entry and notify ([pmd/pte]p_huge_clear_flush_notify())
25 - set page table entry to point to new page
33 Two address addrA and addrB such that \|addrA - addrB\| >= PAGE_SIZE we assume
38 [Time N] --------------------------------------------------------------------
39 CPU-thread-0 {try to write to addrA}
40 CPU-thread-1 {try to write to addrB}
41 CPU-thread-2 {}
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/linux-6.12.1/arch/arm/boot/dts/samsung/
Dexynos5422-odroidxu3-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
12 #include <dt-bindings/input/input.h>
13 #include "exynos5422-odroid-core.dtsi"
20 gpio-keys {
21 compatible = "gpio-keys";
22 pinctrl-names = "default";
23 pinctrl-0 = <&power_key>;
25 power-key {
33 gpios = <&gpx0 3 GPIO_ACTIVE_LOW>;
[all …]
Dexynos5422-odroidhc1.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include "exynos5422-odroid-core.dtsi"
16 compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \
19 led-controller {
20 compatible = "pwm-leds";
22 led-1 {
26 pwm-names = "pwm2";
27 max-brightness = <255>;
[all …]
/linux-6.12.1/kernel/
Dwatchdog_buddy.c1 // SPDX-License-Identifier: GPL-2.0
3 #include <linux/cpu.h>
7 #include <linux/percpu-defs.h>
11 static unsigned int watchdog_next_cpu(unsigned int cpu) in watchdog_next_cpu() argument
15 next_cpu = cpumask_next(cpu, &watchdog_cpus); in watchdog_next_cpu()
19 if (next_cpu == cpu) in watchdog_next_cpu()
30 void watchdog_hardlockup_enable(unsigned int cpu) in watchdog_hardlockup_enable() argument
35 * The new CPU will be marked online before the hrtimer interrupt in watchdog_hardlockup_enable()
36 * gets a chance to run on it. If another CPU tests for a in watchdog_hardlockup_enable()
37 * hardlockup on the new CPU before it has run its the hrtimer in watchdog_hardlockup_enable()
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/linux-6.12.1/tools/perf/pmu-events/arch/x86/snowridgex/
Duncore-io.json13CPU : Card reading from DRAM : Number of DWs (4 bytes) the card requests of the main die. Inclu…
29CPU : Card writing to DRAM : Number of DWs (4 bytes) the card requests of the main die. Include…
56 "Counter": "3",
116 "Counter": "0,1,2,3",
134 "Counter": "0,1,2,3",
145 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
146 "Counter": "0,1,2,3",
152 "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0-7",
158 "Counter": "0,1,2,3",
164 …serts of completions with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
[all …]
/linux-6.12.1/tools/perf/pmu-events/arch/x86/icelakex/
Duncore-io.json24 "Counter": "3",
84 "Counter": "0,1,2,3",
103 "Counter": "0,1,2,3",
114 "BriefDescription": "PCIe Completion Buffer Inserts of completions with data: Part 0-7",
115 "Counter": "0,1,2,3",
121 "PublicDescription": "PCIe Completion Buffer Inserts of completions with data : Part 0-7",
127 "Counter": "0,1,2,3",
133 …serts of completions with data : Part 0 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
139 "Counter": "0,1,2,3",
145 …serts of completions with data : Part 1 : x16 card plugged in to Lane 0/1/2/3, Or x8 card plugged …
[all …]
/linux-6.12.1/Documentation/translations/zh_CN/core-api/
Dworkqueue.rst1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-zh_CN.rst
4 :Original: Documentation/core-api/workqueue.rst
109 每个与实际CPU绑定的worker-pool通过钩住调度器来实现并发管理。每当
139 参数 - ``@name`` , ``@flags`` 和 ``@max_active`` 。
148 ---------
202 --------------
234 0 w0 starts and burns CPU
236 15 w0 wakes up and burns CPU
238 20 w1 starts and burns CPU
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/linux-6.12.1/kernel/sched/
Dtopology.c1 // SPDX-License-Identifier: GPL-2.0
35 static int sched_domain_debug_one(struct sched_domain *sd, int cpu, int level, in sched_domain_debug_one() argument
38 struct sched_group *group = sd->groups; in sched_domain_debug_one()
39 unsigned long flags = sd->flags; in sched_domain_debug_one()
44 printk(KERN_DEBUG "%*s domain-%d: ", level, "", level); in sched_domain_debug_one()
46 cpumask_pr_args(sched_domain_span(sd)), sd->name); in sched_domain_debug_one()
48 if (!cpumask_test_cpu(cpu, sched_domain_span(sd))) { in sched_domain_debug_one()
49 printk(KERN_ERR "ERROR: domain->span does not contain CPU%d\n", cpu); in sched_domain_debug_one()
51 if (group && !cpumask_test_cpu(cpu, sched_group_span(group))) { in sched_domain_debug_one()
52 printk(KERN_ERR "ERROR: domain->groups does not contain CPU%d\n", cpu); in sched_domain_debug_one()
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/linux-6.12.1/Documentation/ABI/stable/
Dsysfs-devices-system-cpu1 What: /sys/devices/system/cpu/dscr_default
2 Date: 13-May-2014
6 /sys/devices/system/cpu/cpuN/dscr on all CPUs.
9 all per-CPU defaults at the same time.
12 What: /sys/devices/system/cpu/cpu[0-9]+/dscr
13 Date: 13-May-2014
17 a CPU.
22 on any CPU where it executes (overriding the value described
27 What: /sys/devices/system/cpu/cpuX/topology/physical_package_id
33 What: /sys/devices/system/cpu/cpuX/topology/die_id
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/linux-6.12.1/Documentation/arch/x86/
Dtopology.rst1 .. SPDX-License-Identifier: GPL-2.0
11 The architecture-agnostic topology definitions are in
12 Documentation/admin-guide/cputopology.rst. This file holds x86-specific
17 Needless to say, code should use the generic functions - this file is *only*
35 - packages
36 - cores
37 - threads
48 Package-related topology information in the kernel:
50 - topology_num_threads_per_package()
54 - topology_num_cores_per_package()
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/linux-6.12.1/Documentation/core-api/
Dworkqueue.rst32 worker thread per CPU and a single threaded (ST) wq had one worker
33 thread system-wide. A single MT wq needed to keep around the same
35 wq users over the years and with the number of CPU cores continuously
42 worker pool. An MT wq could provide only one execution context per CPU
60 * Use per-CPU unified worker pools shared by all wq to provide
85 worker-pools.
87 The cmwq design differentiates between the user-facing workqueues that
89 which manages worker-pools and processes the queued work items.
91 There are two worker-pools, one for normal work items and the other
92 for high priority ones, for each possible CPU and some extra
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/linux-6.12.1/tools/power/x86/intel_pstate_tracer/
Dintel_pstate_tracer.py2 # SPDX-License-Identifier: GPL-2.0-only
3 # -*- coding: utf-8 -*-
7 - If there is Linux trace file with pstate_sample events enabled, then
9 - If user has not specified a trace file as input via command line parameters,
16 python3-gnuplot 1.8 or higher
18 gnuplot-py, python-gnuplot or python3-gnuplot, gnuplot-nox, ... )
20 HWP (Hardware P-States are disabled)
62 C_USEC = 3
79 print(' ./%s_tracer.py [-c cpus] -t <trace_file> -n <test_name>'%driver_name)
81 …print(' ./%s_tracer.py [--cpu cpus] ---trace_file <trace_file> --name <test_name>'%driver_nam…
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