Searched +full:cpts +full:- +full:ext +full:- +full:ts +full:- +full:inputs (Results 1 – 18 of 18) sorted by relevance
/linux-6.12.1/Documentation/devicetree/bindings/net/ |
D | ti,k3-am654-cpts.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/ti,k3-am654-cpts.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: The TI AM654x/J721E Common Platform Time Sync (CPTS) module 10 - Siddharth Vadapalli <s-vadapalli@ti.com> 11 - Roger Quadros <rogerq@kernel.org> 14 The TI AM654x/J721E CPTS module is used to facilitate host control of time 16 Main features of CPTS module are 17 - selection of multiple external clock sources [all …]
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D | ti,k3-am654-cpsw-nuss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/ti,k3-am654-cpsw-nuss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Siddharth Vadapalli <s-vadapalli@ti.com> 11 - Roger Quadros <rogerq@kernel.org> 22 Complex (UDMA-P) controller. 40 new version of Common Platform Time Sync (CPTS) 52 "#address-cells": true 53 "#size-cells": true [all …]
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/linux-6.12.1/arch/arm/boot/dts/ti/keystone/ |
D | keystone-k2g-netcp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com/ 9 compatible = "ti,66ak2g-navss-qm"; 10 dma-coherent; 11 #address-cells = <1>; 12 #size-cells = <1>; 13 power-domains = <&k2g_pds 0x0018>; 15 clock-names = "nss_vclk"; 17 queue-range = <0 0x80>; 22 #address-cells = <1>; [all …]
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/linux-6.12.1/drivers/net/ethernet/ti/ |
D | am65-cpts.c | 1 // SPDX-License-Identifier: GPL-2.0 4 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com 9 #include <linux/clk-provider.h> 23 #include "am65-cpts.h" 201 #define am65_cpts_write32(c, v, r) writel(v, &(c)->reg->r) 202 #define am65_cpts_read32(c, r) readl(&(c)->reg->r) 204 static void am65_cpts_settime(struct am65_cpts *cpts, u64 start_tstamp) in am65_cpts_settime() argument 209 am65_cpts_write32(cpts, val, ts_load_val_hi); in am65_cpts_settime() 211 am65_cpts_write32(cpts, val, ts_load_val_lo); in am65_cpts_settime() 213 am65_cpts_write32(cpts, AM65_CPTS_TS_LOAD_EN, ts_load_en); in am65_cpts_settime() [all …]
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/linux-6.12.1/arch/arm64/boot/dts/ti/ |
D | k3-am65-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "simple-bus"; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 cpsw_mac_syscon: ethernet-mac-syscon@200 { 16 compatible = "ti,am62p-cpsw-mac-efuse", "syscon"; 21 compatible = "ti,am654-phy-gmii-sel"; 23 #phy-cells = <1>; 29 compatible = "pinctrl-single"; [all …]
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D | k3-j7200-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 dmsc: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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D | k3-j721e-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 dmsc: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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D | k3-am64-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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D | k3-j7200-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 serdes_refclk: serdes-refclk { 10 #clock-cells = <0>; 11 compatible = "fixed-clock"; 17 compatible = "mmio-sram"; 19 #address-cells = <1>; 20 #size-cells = <1>; 23 atf-sram@0 { 28 scm_conf: scm-conf@100000 { [all …]
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D | k3-j784s4-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 sms: system-controller@44083000 { 10 bootph-all; 11 compatible = "ti,k2g-sci"; 12 ti,host-id = <12>; 14 mbox-names = "rx", "tx"; 19 reg-names = "debug_messages"; 22 k3_pds: power-controller { 23 bootph-all; [all …]
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D | k3-j721s2-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 9 sms: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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D | k3-j784s4-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/mux/mux.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/phy/phy-ti.h> 12 #include "k3-serdes.h" 15 serdes_refclk: clock-serdes { 16 #clock-cells = <0>; 17 compatible = "fixed-clock"; 25 compatible = "mmio-sram"; [all …]
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D | k3-j721s2-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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D | k3-am62a-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 25 #address-cells = <2>; 26 #size-cells = <2>; 28 #interrupt-cells = <3>; [all …]
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D | k3-am62p-j722s-common-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 11 #address-cells = <1>; 12 #size-cells = <1>; 15 gic500: interrupt-controller@1800000 { 16 compatible = "arm,gic-v3"; 17 #address-cells = <2>; 18 #size-cells = <2>; 20 #interrupt-cells = <3>; [all …]
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D | k3-am62-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 19 #address-cells = <2>; 20 #size-cells = <2>; 22 #interrupt-cells = <3>; [all …]
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D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/phy/phy-ti.h> 9 #include <dt-bindings/mux/mux.h> 11 #include "k3-serdes.h" 14 cmn_refclk: clock-cmnrefclk { 15 #clock-cells = <0>; 16 compatible = "fixed-clock"; 17 clock-frequency = <0>; [all …]
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D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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