/linux-6.12.1/Documentation/devicetree/bindings/net/ |
D | ti,cpsw-switch.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/net/ti,cpsw-switch.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI SoC Ethernet Switch Controller (CPSW) 10 - Siddharth Vadapalli <s-vadapalli@ti.com> 11 - Roger Quadros <rogerq@kernel.org> 14 The 3-port switch gigabit ethernet subsystem provides ethernet packet 15 communication and can be configured as an ethernet switch. It provides the 24 - const: ti,cpsw-switch [all …]
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D | cpsw.txt | 1 TI SoC Ethernet Switch Controller Device Tree Bindings 2 ------------------------------------------------------ 5 - compatible : Should be one of the below:- 6 "ti,cpsw" for backward compatible 7 "ti,am335x-cpsw" for AM335x controllers 8 "ti,am4372-cpsw" for AM437x controllers 9 "ti,dra7-cpsw" for DRA7x controllers 10 - reg : physical base address and size of the cpsw 12 - interrupts : property with a value describing the interrupt 14 - cpdma_channels : Specifies number of channels in CPDMA [all …]
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/linux-6.12.1/drivers/net/ethernet/ti/ |
D | cpsw_new.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Texas Instruments Ethernet Switch Driver 37 #include "cpsw.h" 53 struct cpsw_common *cpsw; member 65 static int cpsw_slave_index_priv(struct cpsw_common *cpsw, in cpsw_slave_index_priv() argument 68 if (priv->emac_port == HOST_PORT_NUM) in cpsw_slave_index_priv() 69 return -1; in cpsw_slave_index_priv() 71 return priv->emac_port - 1; in cpsw_slave_index_priv() 74 static bool cpsw_is_switch_en(struct cpsw_common *cpsw) in cpsw_is_switch_en() argument 76 return !cpsw->data.dual_emac; in cpsw_is_switch_en() [all …]
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D | cpsw_priv.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Texas Instruments Ethernet Switch Driver 25 #include "cpsw.h" 34 int (*cpsw_slave_index)(struct cpsw_common *cpsw, struct cpsw_priv *priv); 36 void cpsw_intr_enable(struct cpsw_common *cpsw) in cpsw_intr_enable() argument 38 writel_relaxed(0xFF, &cpsw->wr_regs->tx_en); in cpsw_intr_enable() 39 writel_relaxed(0xFF, &cpsw->wr_regs->rx_en); in cpsw_intr_enable() 41 cpdma_ctlr_int_ctrl(cpsw->dma, true); in cpsw_intr_enable() 44 void cpsw_intr_disable(struct cpsw_common *cpsw) in cpsw_intr_disable() argument 46 writel_relaxed(0, &cpsw->wr_regs->tx_en); in cpsw_intr_disable() [all …]
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D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 44 bool "TI CPSW Phy mode Selection (DEPRECATED)" 48 the CPSW. DEPRECATED: use PHY_TI_GMII_SEL. 51 tristate "TI CPSW Switch Support" 60 This driver supports TI's CPSW Ethernet Switch. 63 will be called cpsw. 66 tristate "TI CPSW Switch Support with switchdev" 77 This driver supports TI's CPSW Ethernet Switch. 89 the CPSW Ethernet Switch and Keystone 2 1g/10g Switch Subsystem. 97 tristate "TI K3 AM654x/J721E CPSW Ethernet driver" [all …]
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D | cpsw_switchdev.c | 1 // SPDX-License-Identifier: GPL-2.0 15 #include "cpsw.h" 29 struct cpsw_common *cpsw = priv->cpsw; in cpsw_port_stp_state_set() local 33 switch (state) { in cpsw_port_stp_state_set() 48 return -EOPNOTSUPP; in cpsw_port_stp_state_set() 51 ret = cpsw_ale_control_set(cpsw->ale, priv->emac_port, in cpsw_port_stp_state_set() 53 dev_dbg(priv->dev, "ale state: %u\n", cpsw_state); in cpsw_port_stp_state_set() 62 struct cpsw_common *cpsw = priv->cpsw; in cpsw_port_attr_br_flags_set() local 70 dev_dbg(priv->dev, "BR_MCAST_FLOOD: %d port %u\n", in cpsw_port_attr_br_flags_set() 71 unreg_mcast_add, priv->emac_port); in cpsw_port_attr_br_flags_set() [all …]
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D | am65-cpsw-switchdev.c | 1 /* SPDX-License-Identifier: GPL-2.0 */ 4 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ 14 #include "am65-cpsw-nuss.h" 15 #include "am65-cpsw-switchdev.h" 27 struct am65_cpsw_common *cpsw = port->common; in am65_cpsw_port_stp_state_set() local 31 switch (state) { in am65_cpsw_port_stp_state_set() 46 return -EOPNOTSUPP; in am65_cpsw_port_stp_state_set() 49 ret = cpsw_ale_control_set(cpsw->ale, port->port_id, in am65_cpsw_port_stp_state_set() 51 netdev_dbg(port->ndev, "ale state: %u\n", cpsw_state); in am65_cpsw_port_stp_state_set() 60 struct am65_cpsw_common *cpsw = port->common; in am65_cpsw_port_attr_br_flags_set() local [all …]
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D | cpsw_ethtool.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Texas Instruments Ethernet Switch Driver ethtool intf 18 #include "cpsw.h" 111 { "Rx + Tx 65-127 Octet Frames", CPSW_STAT(octetframes65t127) }, 112 { "Rx + Tx 128-255 Octet Frames", CPSW_STAT(octetframes128t255) }, 113 { "Rx + Tx 256-511 Octet Frames", CPSW_STAT(octetframes256t511) }, 114 { "Rx + Tx 512-1023 Octet Frames", CPSW_STAT(octetframes512t1023) }, 115 { "Rx + Tx 1024-Up Octet Frames", CPSW_STAT(octetframes1024tup) }, 145 return priv->msg_enable; in cpsw_get_msglevel() 152 priv->msg_enable = value; in cpsw_set_msglevel() [all …]
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D | cpsw-phy-sel.c | 1 // SPDX-License-Identifier: GPL-2.0 2 /* Texas Instruments Ethernet Switch Driver 16 #include "cpsw.h" 47 reg = readl(priv->gmii_sel); in cpsw_gmii_sel_am3352() 49 switch (phy_mode) { in cpsw_gmii_sel_am3352() 66 dev_warn(priv->dev, in cpsw_gmii_sel_am3352() 79 if (priv->rmii_clock_external) { in cpsw_gmii_sel_am3352() 96 writel(reg, priv->gmii_sel); in cpsw_gmii_sel_am3352() 106 reg = readl(priv->gmii_sel); in cpsw_gmii_sel_dra7xx() 108 switch (phy_mode) { in cpsw_gmii_sel_dra7xx() [all …]
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D | cpsw.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Texas Instruments Ethernet Switch Driver 41 #include "cpsw.h" 52 MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)"); 56 MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)"); 69 struct cpsw_common *cpsw = (priv)->cpsw; \ 71 if (cpsw->data.dual_emac) \ 72 (func)((cpsw)->slaves + priv->emac_port, ##arg);\ 74 for (n = cpsw->data.slaves, \ 75 slave = cpsw->slaves; \ [all …]
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D | am65-cpsw-nuss.c | 1 // SPDX-License-Identifier: GPL-2.0 2 /* Texas Instruments K3 AM65 Ethernet Switch SubSystem Driver 4 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 32 #include <linux/dma/ti-cppi5.h> 33 #include <linux/dma/k3-udma-glue.h> 39 #include "am65-cpsw-nuss.h" 40 #include "am65-cpsw-switchdev.h" 41 #include "k3-cppi-desc-pool.h" 42 #include "am65-cpts.h" 125 /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */ [all …]
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D | cpsw_priv.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * Texas Instruments Ethernet Switch Driver 26 dev_info(priv->dev, format, ## __VA_ARGS__); \ 32 dev_err(priv->dev, format, ## __VA_ARGS__); \ 38 dev_dbg(priv->dev, format, ## __VA_ARGS__); \ 44 dev_notice(priv->dev, format, ## __VA_ARGS__); \ 127 #define CPSW_FIFO_SHAPERS_NUM (CPSW_TC_NUM - 1) 184 #define CPSW1_TX_PRI_MAP 0x10 /* Tx Header Priority to Switch Pri Mapping */ 195 #define CPSW2_TX_PRI_MAP 0x18 /* Tx Header Priority to Switch Pri Mapping */ 225 #define TS_TTL_NONZERO BIT(8) /* Time Sync Time To Live Non-zero enable */ [all …]
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D | cpsw_switchdev.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * Texas Instruments Ethernet Switch Driver 12 int cpsw_switchdev_register_notifiers(struct cpsw_common *cpsw); 13 void cpsw_switchdev_unregister_notifiers(struct cpsw_common *cpsw);
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D | cpsw-common.c | 1 // SPDX-License-Identifier: GPL-2.0+ 9 #include "cpsw.h" 21 syscon = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon"); in davinci_emac_3517_get_macid() 23 if (PTR_ERR(syscon) == -ENODEV) in davinci_emac_3517_get_macid() 48 syscon = syscon_regmap_lookup_by_phandle(dev->of_node, "syscon"); in cpsw_am33xx_cm_get_macid() 50 if (PTR_ERR(syscon) == -ENODEV) in cpsw_am33xx_cm_get_macid() 76 if (of_device_is_compatible(dev->of_node, "ti,am3517-emac")) in ti_cm_get_macid() 79 if (of_device_is_compatible(dev->of_node, "ti,dm816-emac")) in ti_cm_get_macid() 89 return -ENOENT; in ti_cm_get_macid() 93 MODULE_DESCRIPTION("TI CPSW Switch common module");
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D | am65-cpsw-ethtool.c | 1 // SPDX-License-Identifier: GPL-2.0 2 /* Texas Instruments K3 AM65 Ethernet Switch SubSystem Driver ethtool ops 4 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 13 #include "am65-cpsw-nuss.h" 14 #include "am65-cpsw-qos.h" 16 #include "am65-cpts.h" 34 * struct am65_cpsw_regdump_hdr - regdump record header 36 * @module_id: CPSW module ID 37 * @len: CPSW module registers space length in u32 46 * struct am65_cpsw_regdump_item - regdump module description [all …]
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D | am65-cpsw-qos.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 6 * Enhanced Scheduler Traffic (EST - P802.1Qbv/D2.2) 7 * Interspersed Express Traffic (IET - P802.3br/D2.0) 17 #include "am65-cpsw-nuss.h" 18 #include "am65-cpsw-qos.h" 19 #include "am65-cpts.h" 47 writel(0, port->port_base + AM65_CPSW_PN_REG_PRI_CIR(prio)); in am65_cpsw_tx_pn_shaper_reset() 48 writel(0, port->port_base + AM65_CPSW_PN_REG_PRI_EIR(prio)); in am65_cpsw_tx_pn_shaper_reset() 54 struct am65_cpsw_mqprio *p_mqprio = &port->qos.mqprio; in am65_cpsw_tx_pn_shaper_apply() [all …]
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D | cpsw_sl.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Texas Instruments Ethernet Switch media-access-controller (MAC) submodule/ 122 .device_id = "cpsw", 193 if (sl->regs[reg] == CPSW_SL_REG_NOTUSED) { in cpsw_sl_reg_read() 194 dev_err(sl->dev, "cpsw_sl: not sup r reg: %04X\n", in cpsw_sl_reg_read() 195 sl->regs[reg]); in cpsw_sl_reg_read() 199 val = readl(sl->sl_base + sl->regs[reg]); in cpsw_sl_reg_read() 200 dev_dbg(sl->dev, "cpsw_sl: reg: %04X r 0x%08X\n", sl->regs[reg], val); in cpsw_sl_reg_read() 206 if (sl->regs[reg] == CPSW_SL_REG_NOTUSED) { in cpsw_sl_reg_write() 207 dev_err(sl->dev, "cpsw_sl: not sup w reg: %04X\n", in cpsw_sl_reg_write() [all …]
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D | cpsw_ale.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Texas Instruments N-Port Ethernet Switch Address Lookup Engine 24 #define BITMASK(bits) (BIT(bits) - 1) 42 /* ALE NetCP NU switch specific Registers */ 75 * struct ale_entry_fld - The ALE tbl entry field description 94 * struct cpsw_ale_dev_id - The ALE version/SoC specific configuration 100 * @nu_switch_ale: NU Switch ALE 134 idx2 = (start + bits - 1) / 32; in cpsw_ale_get_field() 137 idx2 = 2 - idx2; /* flip */ in cpsw_ale_get_field() 138 hi_val = ale_entry[idx2] << ((idx2 * 32) - start); in cpsw_ale_get_field() [all …]
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/linux-6.12.1/Documentation/networking/devlink/ |
D | ti-cpsw-switch.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 ti-cpsw-switch devlink support 7 This document describes the devlink features implemented by the ``ti-cpsw-switch`` 13 The ``ti-cpsw-switch`` driver implements the following driver-specific 16 .. list-table:: Driver-specific parameters implemented 19 * - Name 20 - Type 21 - Mode 22 - Description 23 * - ``ale_bypass`` [all …]
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D | am65-nuss-cpsw-switch.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 am65-cpsw-nuss devlink support 7 This document describes the devlink features implemented by the ``am65-cpsw-nuss`` 13 The ``am65-cpsw-nuss`` driver implements the following driver-specific 16 .. list-table:: Driver-specific parameters implemented 19 * - Name 20 - Type 21 - Mode 22 - Description 23 * - ``switch_mode`` [all …]
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D | index.rst | 5 related to any device class, such as chip-wide/switch-ASIC-wide configuration. 8 ------- 13 in devlink core, but don't allow registration of most sub-objects once 26 ---------------- 32 - Lock ordering should be maintained. If driver needs to take instance 36 - Driver should use object-specific helpers to setup the 39 - ``devl_nested_devlink_set()`` - called to setup devlink -> nested 41 - ``devl_port_fn_devlink_set()`` - called to setup port function -> 43 - ``devlink_linecard_nested_dl_set()`` - called to setup linecard -> 46 The nested devlink info is exposed to the userspace over object-specific [all …]
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/linux-6.12.1/Documentation/networking/device_drivers/ethernet/ti/ |
D | cpsw_switchdev.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 Texas Instruments CPSW switchdev based ethernet driver 17 ip -d link show dev sw0p1 | grep switchid 26 - The new (cpsw_new.c) driver is operating in dual-emac mode by default, thus 27 working as 2 individual network interfaces. Main differences from legacy CPSW 30 - optimized promiscuous mode: The P0_UNI_FLOOD (both ports) is enabled in 34 to the same bridge, but without enabling "switch" mode, or to different 36 - learning disabled on ports as it make not too much sense for 37 segregated ports - no forwarding in HW. 38 - enabled basic support for devlink. [all …]
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D | am65_nuss_cpsw_switchdev.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 Texas Instruments K3 AM65 CPSW NUSS switchdev based ethernet driver 14 ip -d link show dev sw0p1 | grep switchid 23 - The driver is operating in multi-mac mode by default, thus 29 See Documentation/networking/devlink/am65-nuss-cpsw-switch.rst 31 Enabling "switch" 34 The Switch mode can be enabled by configuring devlink driver parameter 40 This can be done regardless of the state of Port's netdev devices - UP/DOWN, but 42 overwriting of bridge configuration as CPSW switch driver completely reloads its 45 When the both interfaces joined the bridge - CPSW switch driver will enable [all …]
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/linux-6.12.1/drivers/phy/ti/ |
D | phy-gmii-sel.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Texas Instruments CPSW Port's PHY Interface Mode selection Driver 5 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/ 7 * Based on cpsw-phy-sel.c driver created by Mugunthan V N <mugunthanvnm@ti.com> 31 #define PHY_GMII_PORT(n) BIT((n) - 1) 73 const struct phy_gmii_sel_soc_data *soc_data = if_phy->priv->soc_data; in phy_gmii_sel_mode() 74 struct device *dev = if_phy->priv->dev; in phy_gmii_sel_mode() 80 return -EINVAL; in phy_gmii_sel_mode() 82 switch (submode) { in phy_gmii_sel_mode() 104 if (!(soc_data->extra_modes & BIT(PHY_INTERFACE_MODE_QSGMII))) in phy_gmii_sel_mode() [all …]
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/linux-6.12.1/arch/arm/boot/dts/ti/omap/ |
D | am437x-idk-evm.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/ 6 /dts-v1/; 9 #include <dt-bindings/pinctrl/am43xx.h> 10 #include <dt-bindings/pwm/pwm.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 16 compatible = "ti,am437x-idk-evm","ti,am4372","ti,am43"; 19 stdout-path = &uart0; 22 v24_0d: fixed-regulator-v24_0d { [all …]
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