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/linux-6.12.1/Documentation/misc-devices/
Doxsemi-tornado.rst27 prescaler is programmed with the CPR/CPR2 register pair [OX200]_ [OX952]_
32 Additionally writing any value to CPR clears CPR2 for compatibility with
35 CPR/CPR2 register pair has to be programmed in the right order.
45 (tcr), the clock prescaler (cpr) and the divisor (div) produced by the
50 r: 15625000, a: 15625000.00, d: 0.0000%, tcr: 4, cpr: 1.000, div: 1
51 r: 12500000, a: 12500000.00, d: 0.0000%, tcr: 5, cpr: 1.000, div: 1
52 r: 10416666, a: 10416666.67, d: 0.0000%, tcr: 6, cpr: 1.000, div: 1
53 r: 8928571, a: 8928571.43, d: 0.0000%, tcr: 7, cpr: 1.000, div: 1
54 r: 7812500, a: 7812500.00, d: 0.0000%, tcr: 8, cpr: 1.000, div: 1
55 r: 4000000, a: 4000000.00, d: 0.0000%, tcr: 5, cpr: 3.125, div: 1
[all …]
/linux-6.12.1/tools/perf/util/
Dcall-path.c28 struct call_path_root *cpr; in call_path_root__new() local
30 cpr = zalloc(sizeof(struct call_path_root)); in call_path_root__new()
31 if (!cpr) in call_path_root__new()
33 call_path__init(&cpr->call_path, NULL, NULL, 0, false); in call_path_root__new()
34 INIT_LIST_HEAD(&cpr->blocks); in call_path_root__new()
35 return cpr; in call_path_root__new()
38 void call_path_root__free(struct call_path_root *cpr) in call_path_root__free() argument
42 list_for_each_entry_safe(pos, n, &cpr->blocks, node) { in call_path_root__free()
46 free(cpr); in call_path_root__free()
49 static struct call_path *call_path__new(struct call_path_root *cpr, in call_path__new() argument
[all …]
Dthread-stack.c762 crp->cpr = call_path_root__new(); in call_return_processor__new()
763 if (!crp->cpr) in call_return_processor__new()
777 call_path_root__free(crp->cpr); in call_return_processor__free()
864 struct call_path_root *cpr = ts->crp->cpr; in thread_stack__bottom() local
879 cp = call_path__findnew(cpr, &cpr->call_path, sym, ip, in thread_stack__bottom()
909 struct call_path_root *cpr = ts->crp->cpr; in thread_stack__no_call_return() local
910 struct call_path *root = &cpr->call_path; in thread_stack__no_call_return()
928 cp = call_path__findnew(cpr, root, tsym, addr, ks); in thread_stack__no_call_return()
958 cp = call_path__findnew(cpr, root, tsym, addr, ks); in thread_stack__no_call_return()
968 cp = call_path__findnew(cpr, parent, tsym, addr, ks); in thread_stack__no_call_return()
[all …]
Dcall-path.h62 void call_path_root__free(struct call_path_root *cpr);
64 struct call_path *call_path__findnew(struct call_path_root *cpr,
Dthread-stack.h72 * @cpr: call path root
77 struct call_path_root *cpr; member
Ddb-export.c216 struct call_path *current = &dbe->cpr->call_path; in call_path_from_sample()
266 current = call_path__findnew(dbe->cpr, current, in call_path_from_sample()
277 if (current == &dbe->cpr->call_path) { in call_path_from_sample()
388 if (dbe->cpr) { in db_export__sample()
/linux-6.12.1/Documentation/devicetree/bindings/cpufreq/
Dqcom-cpufreq-nvmem.yaml14 voltage is dynamically configured by Core Power Reduction (CPR) depending on
16 CPR provides a power domain with multiple levels that are selected depending
17 on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level
21 voltage and CPR is not supported/used.
88 - const: cpr
130 power-domains = <&cpr>;
131 power-domain-names = "cpr";
144 power-domains = <&cpr>;
145 power-domain-names = "cpr";
158 power-domains = <&cpr>;
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/power/avs/
Dqcom,cpr.yaml4 $id: http://devicetree.org/schemas/power/avs/qcom,cpr.yaml#
7 title: Qualcomm Core Power Reduction (CPR)
13 CPR (Core Power Reduction) is a technology to reduce core power on a CPU
16 running at a particular frequency, CPR monitors dynamic factors such as
24 - qcom,qcs404-cpr
25 - const: qcom,cpr
51 supported by the CPR power domain.
107 cpr_opp_table: opp-table-cpr {
125 compatible = "qcom,qcs404-cpr", "qcom,cpr";
/linux-6.12.1/drivers/pcmcia/
Dpxa2xx_sharpsl.c57 unsigned short cpr, csr; in sharpsl_pcmcia_socket_state() local
60 cpr = read_scoop_reg(SCOOP_DEV[skt->nr].dev, SCOOP_CPR); in sharpsl_pcmcia_socket_state()
76 else if (cpr & 0x0003) { in sharpsl_pcmcia_socket_state()
98 if ((cpr & 0x0080) && ((cpr & 0x8040) != 0x8040)) { in sharpsl_pcmcia_socket_state()
99 printk(KERN_ERR "sharpsl_pcmcia_socket_state(): CPR=%04X, Low voltage!\n", cpr); in sharpsl_pcmcia_socket_state()
110 unsigned short cpr, ncpr, ccr, nccr, mcr, nmcr, imr, nimr; in sharpsl_pcmcia_configure_socket() local
129 ncpr = (cpr = read_scoop_reg(scoop, SCOOP_CPR)) & ~0x0083; in sharpsl_pcmcia_configure_socket()
161 if (cpr != ncpr) { in sharpsl_pcmcia_configure_socket()
/linux-6.12.1/drivers/net/ethernet/broadcom/bnxt/
Dbnxt_dim.c17 struct bnxt_cp_ring_info *cpr = container_of(dim, in bnxt_dim_work() local
20 struct bnxt_napi *bnapi = container_of(cpr, in bnxt_dim_work()
26 cpr->rx_ring_coal.coal_ticks = cur_moder.usec; in bnxt_dim_work()
27 cpr->rx_ring_coal.coal_bufs = cur_moder.pkts; in bnxt_dim_work()
Dbnxt.c1009 struct bnxt_cp_ring_info *cpr, in bnxt_get_agg() argument
1016 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)]; in bnxt_get_agg()
1029 static void bnxt_reuse_rx_agg_bufs(struct bnxt_cp_ring_info *cpr, u16 idx, in bnxt_reuse_rx_agg_bufs() argument
1032 struct bnxt_napi *bnapi = cpr->bnapi; in bnxt_reuse_rx_agg_bufs()
1053 agg = bnxt_get_agg(bp, cpr, idx, start + i); in bnxt_reuse_rx_agg_bufs()
1195 struct bnxt_cp_ring_info *cpr, in __bnxt_rx_agg_pages() argument
1200 struct bnxt_napi *bnapi = cpr->bnapi; in __bnxt_rx_agg_pages()
1221 agg = bnxt_get_agg(bp, cpr, idx, i); in __bnxt_rx_agg_pages()
1251 bnxt_reuse_rx_agg_bufs(cpr, idx, i, agg_bufs - i, tpa); in __bnxt_rx_agg_pages()
1266 struct bnxt_cp_ring_info *cpr, in bnxt_rx_agg_pages_skb() argument
[all …]
Dbnxt_debugfs.c84 struct bnxt_cp_ring_info *cpr = &bp->bnapi[i]->cp_ring; in bnxt_debug_dev_init() local
86 if (cpr && bp->bnapi[i]->rx_ring) in bnxt_debug_dev_init()
87 debugfs_dim_ring_init(&cpr->dim, i, dir); in bnxt_debug_dev_init()
/linux-6.12.1/drivers/pmdomain/qcom/
DKconfig5 tristate "QCOM Core Power Reduction (CPR) support"
10 Say Y here to enable support for the CPR hardware found on Qualcomm
14 tables based on feedback from the CPR hardware. If you want to do
18 be called qcom-cpr
Dcpr.c29 /* Register Offsets for RB-CPR and Bit Definitions */
120 /* CPR eFuse parameters */
605 dev_dbg(drv->dev, "CPR is disabled\n"); in cpr_irq_handler()
608 dev_dbg(drv->dev, "CPR measurement is not ready\n"); in cpr_irq_handler()
687 /* Disable interrupt and CPR */ in cpr_config()
1487 dev_err(drv->dev, "need at least 2 OPPs to use CPR\n"); in cpr_pd_attach_dev()
1507 /* Configure CPR HW but keep it disabled */ in cpr_pd_attach_dev()
1665 "cpr", drv); in cpr_probe()
1713 { .compatible = "qcom,qcs404-cpr", .data = &qcs404_cpr_acc_desc },
1722 .name = "qcom-cpr",
[all …]
DMakefile2 obj-$(CONFIG_QCOM_CPR) += cpr.o
/linux-6.12.1/Documentation/devicetree/bindings/opp/
Dopp-v2-kryo-cpu.yaml124 power-domains = <&cpr>;
125 power-domain-names = "cpr";
144 power-domains = <&cpr>;
145 power-domain-names = "cpr";
159 power-domains = <&cpr>;
160 power-domain-names = "cpr";
179 power-domains = <&cpr>;
180 power-domain-names = "cpr";
/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dintel,keembay-phy-usb.yaml18 - description: USB APB CPR (clock, power, reset) register
23 - const: cpr-apb-base
42 reg-names = "cpr-apb-base", "slv-apb-base";
/linux-6.12.1/drivers/crypto/intel/qat/qat_common/
Dadf_gen4_ras.h532 * BIT(16) - Parity error detected in CPR Push FIFO
533 * BIT(17) - Parity error detected in CPR Pull FIFO
534 * BIT(18) - Parity error detected in CPR Hash Table
535 * BIT(19) - Parity error detected in CPR History Buffer Copy 0
536 * BIT(20) - Parity error detected in CPR History Buffer Copy 1
537 * BIT(21) - Parity error detected in CPR History Buffer Copy 2
538 * BIT(22) - Parity error detected in CPR History Buffer Copy 3
539 * BIT(23) - Parity error detected in CPR History Buffer Copy 4
540 * BIT(24) - Parity error detected in CPR History Buffer Copy 5
541 * BIT(25) - Parity error detected in CPR History Buffer Copy 6
[all …]
Dadf_gen4_tl.c65 ADF_GEN4_TL_SL_UTIL_COUNTER(cpr),
87 ADF_GEN4_TL_SL_EXEC_COUNTER(cpr),
/linux-6.12.1/drivers/gpu/drm/tidss/
Dtidss_dispc.c2501 struct dispc_csc_coef *cpr) in dispc_k2g_cpr_from_ctm() argument
2503 memset(cpr, 0, sizeof(*cpr)); in dispc_k2g_cpr_from_ctm()
2505 cpr->to_regval = dispc_csc_cpr_regval; in dispc_k2g_cpr_from_ctm()
2506 cpr->m[CSC_RR] = dispc_S31_32_to_s2_8(ctm->matrix[0]); in dispc_k2g_cpr_from_ctm()
2507 cpr->m[CSC_RG] = dispc_S31_32_to_s2_8(ctm->matrix[1]); in dispc_k2g_cpr_from_ctm()
2508 cpr->m[CSC_RB] = dispc_S31_32_to_s2_8(ctm->matrix[2]); in dispc_k2g_cpr_from_ctm()
2509 cpr->m[CSC_GR] = dispc_S31_32_to_s2_8(ctm->matrix[3]); in dispc_k2g_cpr_from_ctm()
2510 cpr->m[CSC_GG] = dispc_S31_32_to_s2_8(ctm->matrix[4]); in dispc_k2g_cpr_from_ctm()
2511 cpr->m[CSC_GB] = dispc_S31_32_to_s2_8(ctm->matrix[5]); in dispc_k2g_cpr_from_ctm()
2512 cpr->m[CSC_BR] = dispc_S31_32_to_s2_8(ctm->matrix[6]); in dispc_k2g_cpr_from_ctm()
[all …]
/linux-6.12.1/drivers/gpu/drm/omapdrm/
Domap_crtc.c382 struct omap_dss_cpr_coefs *cpr) in omap_crtc_cpr_coefs_from_ctm() argument
384 cpr->rr = omap_crtc_s31_32_to_s2_8(ctm->matrix[0]); in omap_crtc_cpr_coefs_from_ctm()
385 cpr->rg = omap_crtc_s31_32_to_s2_8(ctm->matrix[1]); in omap_crtc_cpr_coefs_from_ctm()
386 cpr->rb = omap_crtc_s31_32_to_s2_8(ctm->matrix[2]); in omap_crtc_cpr_coefs_from_ctm()
387 cpr->gr = omap_crtc_s31_32_to_s2_8(ctm->matrix[3]); in omap_crtc_cpr_coefs_from_ctm()
388 cpr->gg = omap_crtc_s31_32_to_s2_8(ctm->matrix[4]); in omap_crtc_cpr_coefs_from_ctm()
389 cpr->gb = omap_crtc_s31_32_to_s2_8(ctm->matrix[5]); in omap_crtc_cpr_coefs_from_ctm()
390 cpr->br = omap_crtc_s31_32_to_s2_8(ctm->matrix[6]); in omap_crtc_cpr_coefs_from_ctm()
391 cpr->bg = omap_crtc_s31_32_to_s2_8(ctm->matrix[7]); in omap_crtc_cpr_coefs_from_ctm()
392 cpr->bb = omap_crtc_s31_32_to_s2_8(ctm->matrix[8]); in omap_crtc_cpr_coefs_from_ctm()
/linux-6.12.1/arch/arm/mach-pxa/
Dspitz.c217 unsigned short cpr; in spitz_card_pwr_ctrl() local
227 cpr = read_scoop_reg(&spitz_scoop_1_device.dev, SCOOP_CPR); in spitz_card_pwr_ctrl()
230 cpr |= new_cpr; in spitz_card_pwr_ctrl()
232 cpr &= ~enable; in spitz_card_pwr_ctrl()
234 write_scoop_reg(&spitz_scoop_1_device.dev, SCOOP_CPR, cpr); in spitz_card_pwr_ctrl()
238 if (!(cpr & 0x7)) { in spitz_card_pwr_ctrl()
253 static void spitz_pcmcia_pwr(struct device *scoop, uint16_t cpr, int nr) in spitz_pcmcia_pwr() argument
258 cpr & (SCOOP_CPR_CF_3V | SCOOP_CPR_CF_XV), cpr); in spitz_pcmcia_pwr()
260 write_scoop_reg(scoop, SCOOP_CPR, cpr); in spitz_pcmcia_pwr()
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dqcs404.dtsi49 power-domains = <&cpr>;
50 power-domain-names = "cpr";
63 power-domains = <&cpr>;
64 power-domain-names = "cpr";
77 power-domains = <&cpr>;
78 power-domain-names = "cpr";
91 power-domains = <&cpr>;
92 power-domain-names = "cpr";
134 cpr_opp_table: opp-table-cpr {
1341 cpr: power-controller@b018000 { label
[all …]
Dmsm8956-sony-xperia-loire.dtsi89 /* Set .95V to prevent unstabilities until CPR for this SoC is done */
113 /* Set .95V to prevent unstabilities until CPR for this SoC is done */
/linux-6.12.1/arch/powerpc/boot/dts/
Drainier.dts96 CPR0: cpr {
97 compatible = "ibm,cpr-440grx", "ibm,cpr-440ep";

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