Searched +full:conf +full:- +full:pu (Results 1 – 11 of 11) sorted by relevance
/linux-6.12.1/drivers/pinctrl/ |
D | pinctrl-st.c | 1 // SPDX-License-Identifier: GPL-2.0-only 100 * (direction, retime-type, retime-clk, retime-delay) 102 * +----------------+ 103 *[31:28]| reserved-3 | 104 * +----------------+------------- 106 * +----------------+ v 107 *[26] | pu | [Direction ] 108 * +----------------+ ^ 110 * +----------------+------------- 111 *[24] | reserved-2 | [all …]
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/linux-6.12.1/Documentation/devicetree/bindings/pinctrl/ |
D | pinctrl-st.txt | 3 Each multi-function pin is controlled, driven and routed through the 5 and multiple alternate functions(ALT1 - ALTx) that directly connect 9 Pull Up (PU) are driven by the related PIO block. 14 GPIO bank can have one of the two possible types of interrupt-wirings. 20 | |----> [gpio-bank (n) ] 21 | |----> [gpio-bank (n + 1)] 22 [irqN]-- | irq-mux |----> [gpio-bank (n + 2)] 23 | |----> [gpio-bank (... )] 24 |_________|----> [gpio-bank (n + 7)] 28 [irqN]----> [gpio-bank (n)] [all …]
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D | mediatek,mt7981-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7981-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Daniel Golle <daniel@makrotopia.org> 18 - mediatek,mt7981-pinctrl 24 reg-names: 26 - const: gpio 27 - const: iocfg_rt 28 - const: iocfg_rm [all …]
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/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
D | dp.c | 42 #define AMPERE_IED_HACK(disp) ((disp)->engine.subdev.device->card_type >= GA100) 53 *pid = BIT(outp->index); in nvkm_dp_mst_id_get() 60 int ret = nvkm_i2c_aux_acquire(outp->dp.aux); in nvkm_dp_aux_xfer() 65 ret = nvkm_i2c_aux_xfer(outp->dp.aux, false, type, addr, data, size); in nvkm_dp_aux_xfer() 66 nvkm_i2c_aux_release(outp->dp.aux); in nvkm_dp_aux_xfer() 71 nvkm_dp_aux_pwr(struct nvkm_outp *outp, bool pu) in nvkm_dp_aux_pwr() argument 73 outp->dp.enabled = pu; in nvkm_dp_aux_pwr() 74 nvkm_dp_enable(outp, outp->dp.enabled); in nvkm_dp_aux_pwr() 85 u8 conf[4]; member 94 struct nvkm_outp *outp = lt->outp; in nvkm_dp_train_sense() [all …]
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/linux-6.12.1/drivers/pinctrl/cirrus/ |
D | pinctrl-madera-core.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2016-2018 Cirrus Logic 17 #include <linux/pinctrl/pinconf-generic.h> 25 #include "../pinctrl-utils.h" 27 #include "pinctrl-madera.h" 31 * NOTE: IDs are zero-indexed for coding convenience 77 * All single-pin functions can be mapped to any GPIO, however pinmux applies 81 * Since these do not correspond to anything in the actual hardware - they are 82 * merely an adaptation to pinctrl's view of the world - we use the same name 94 /* set of pin numbers for single-pin groups, zero-indexed */ [all …]
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/linux-6.12.1/Documentation/RCU/ |
D | RTFP.txt | 4 This document describes RCU-related publications, and is followed by 19 with short-lived threads, such as the K42 research operating system. 20 However, Linux has long-lived tasks, so more is needed. 23 serialization, which is an RCU-like mechanism that relies on the presence 27 that these overheads were not so expensive in the mid-80s. Nonetheless, 28 passive serialization appears to be the first deferred-destruction 30 has lapsed, so this approach may be used in non-GPL software, if desired. 34 In 1987, Rashid et al. described lazy TLB-flush [RichardRashid87a]. 36 this paper helped inspire the update-side batching used in the later 38 a description of Argus that noted that use of out-of-date values can [all …]
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/linux-6.12.1/drivers/firmware/xilinx/ |
D | zynqmp.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2014-2022 Xilinx, Inc. 6 * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc. 14 #include <linux/arm-smccc.h> 27 #include <linux/firmware/xlnx-zynqmp.h> 28 #include <linux/firmware/xlnx-event-manager.h> 29 #include "zynqmp-debug.h" 36 /* BOOT_PIN_CTRL- Used to control the mode pins after boot */ 38 /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */ 52 * struct zynqmp_devinfo - Structure for Zynqmp device instance [all …]
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/linux-6.12.1/drivers/md/ |
D | md-cluster.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 13 #include "md-bitmap.h" 14 #include "md-cluster.h" 124 res->sync_locking_done = true; in sync_ast() 125 wake_up(&res->sync_locking); in sync_ast() 132 ret = dlm_lock(res->ls, mode, &res->lksb, in dlm_lock_sync() 133 res->flags, res->name, strlen(res->name), in dlm_lock_sync() 134 0, sync_ast, res, res->bast); in dlm_lock_sync() 137 ret = wait_event_timeout(res->sync_locking, res->sync_locking_done, in dlm_lock_sync() 139 res->sync_locking_done = false; in dlm_lock_sync() [all …]
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D | md.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 10 - RAID-1/RAID-5 extensions by Miguel de Icaza, Gadi Oxman, Ingo Molnar 11 - RAID-6 extensions by H. Peter Anvin <hpa@zytor.com> 12 - boot support for linear and striped mode by Harald Hoyer <HarryH@Royal.Net> 13 - kerneld support by Boris Tobotras <boris@xtalk.msk.su> 14 - kmod support by: Cyrus Durgin 15 - RAID0 bugfixes: Mark Anthony Lisher <markal@iname.com> 16 - Devfs support by Richard Gooch <rgooch@atnf.csiro.au> 18 - lots of fixes and improvements to the RAID1/RAID5 and generic 23 - persistent bitmap code [all …]
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/linux-6.12.1/drivers/net/wireless/broadcom/b43/ |
D | b43.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 61 /* 32-bit DMA */ 68 /* 64-bit DMA */ 203 #define B43_BFL2_APLL_WAR 0x0002 /* alternative A-band PLL settings implemented */ 209 #define B43_BFL2_BTC3WIRE 0x0080 /* used 3-wire bluetooth coexist */ 211 #define B43_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */ 212 #define B43_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */ 234 #define B43_SHM_AUTOINC_R 0x0200 /* Auto-increment address on read */ 235 #define B43_SHM_AUTOINC_W 0x0100 /* Auto-increment address on write */ 330 #define B43_SHM_SH_SPUWKUP 0x0094 /* pre-wakeup for synth PU in us */ [all …]
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/linux-6.12.1/drivers/net/ethernet/broadcom/bnx2x/ |
D | bnx2x_main.c | 3 * Copyright (c) 2007-2013 Broadcom Corporation 36 #include <linux/dma-mapping.h> 83 #define FW_FILE_NAME_E1 "bnx2x/bnx2x-e1-" FW_FILE_VERSION ".fw" 84 #define FW_FILE_NAME_E1H "bnx2x/bnx2x-e1h-" FW_FILE_VERSION ".fw" 85 #define FW_FILE_NAME_E2 "bnx2x/bnx2x-e2-" FW_FILE_VERSION ".fw" 86 #define FW_FILE_NAME_E1_V15 "bnx2x/bnx2x-e1-" FW_FILE_VERSION_V15 ".fw" 87 #define FW_FILE_NAME_E1H_V15 "bnx2x/bnx2x-e1h-" FW_FILE_VERSION_V15 ".fw" 88 #define FW_FILE_NAME_E2_V15 "bnx2x/bnx2x-e2-" FW_FILE_VERSION_V15 ".fw" 117 MODULE_PARM_DESC(int_mode, " Force interrupt mode other than MSI-X " 124 static int mrrs = -1; [all …]
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