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/linux-6.12.1/Documentation/devicetree/bindings/phy/
Dintel,combo-phy.yaml7 title: Intel ComboPhy Subsystem
13 Intel Combophy subsystem supports PHYs for PCIe, EMAC and SATA
14 controllers. A single Combophy provides two PHY instances.
18 pattern: "combophy(@.*|-([0-9]|[1-9][0-9]+))?$"
22 - const: intel,combophy-lgm
30 - description: ComboPhy core registers
53 - description: ComboPhy instance id
54 description: Chip configuration registers handle and ComboPhy instance id
61 - description: ComboPhy instance id
62 description: HSIO registers handle and ComboPhy instance id on NOC
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Dcalxeda-combophy.yaml4 $id: http://devicetree.org/schemas/phy/calxeda-combophy.yaml#
22 const: calxeda,hb-combophy
31 description: device ID for programming the ComboPHY.
46 compatible = "calxeda,hb-combophy";
/linux-6.12.1/drivers/phy/intel/
DKconfig30 bool "Intel Lightning Mountain ComboPHY driver"
37 Enable this to support Intel ComboPhy.
39 This driver configures ComboPhy subsystem on Intel gateway
Dphy-intel-lgm-combo.c55 * for ComboPhy according to the mode.
63 /* ComboPhy mode Register values */
233 dev_err(dev, "Failed to set ComboPhy mode: %d\n", ret); in intel_cbphy_set_mode()
450 * in which ComboPhy subsystem specific registers are subset. Using in intel_cbphy_fwnode_parse()
528 dev_err(dev, "Invalid. ComboPhy is in Dual lane mode %d\n", iphy_id); in intel_cbphy_xlate()
602 { .compatible = "intel,combophy-lgm" },
/linux-6.12.1/Documentation/devicetree/bindings/ata/
Dsata_highbank.yaml49 phandle-combophy and lane assignment, which maps each SATA port to a
50 combophy and a lane within that combophy
/linux-6.12.1/arch/arm/boot/dts/calxeda/
Decx-common.dtsi218 compatible = "calxeda,hb-combophy";
225 compatible = "calxeda,hb-combophy";
/linux-6.12.1/drivers/phy/rockchip/
Dphy-rockchip-usbdp.c863 dev_err(udphy->dev, "failed to init combophy\n"); in rk_udphy_setup()
/linux-6.12.1/drivers/clk/stm32/
Dclk-stm32mp25.c1502 /* USB3 PCIe COMBOPHY */