Searched full:cmn_refclk_dig_div (Results 1 – 5 of 5) sorted by relevance
| /linux-6.12.1/Documentation/devicetree/bindings/phy/ |
| D | phy-cadence-sierra.yaml | 59 - const: cmn_refclk_dig_div
147 clocks = <&cmn_refclk_dig_div>, <&cmn_refclk1_dig_div>;
148 clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div";
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| D | ti,phy-j721e-wiz.yaml | 257 clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div";
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| /linux-6.12.1/drivers/phy/ti/ |
| D | phy-j721e-wiz.c | 76 CMN_REFCLK_DIG_DIV, enumerator
554 wiz->div_sel_field[CMN_REFCLK_DIG_DIV] = in wiz_regfield_init()
556 if (IS_ERR(wiz->div_sel_field[CMN_REFCLK_DIG_DIV])) { in wiz_regfield_init()
558 return PTR_ERR(wiz->div_sel_field[CMN_REFCLK_DIG_DIV]); in wiz_regfield_init()
1094 regmap_field_write(wiz->div_sel_field[CMN_REFCLK_DIG_DIV], 0x2); in wiz_clock_init()
1097 regmap_field_write(wiz->div_sel_field[CMN_REFCLK_DIG_DIV], 0x3); in wiz_clock_init()
1100 regmap_field_write(wiz->div_sel_field[CMN_REFCLK_DIG_DIV], 0); in wiz_clock_init()
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| /linux-6.12.1/drivers/phy/cadence/ |
| D | phy-cadence-sierra.c | 237 CMN_REFCLK_DIG_DIV, enumerator
557 clk_set_rate(phy->input_clks[CMN_REFCLK_DIG_DIV], 25000000); in cdns_sierra_phy_init()
1157 clk = devm_clk_get_optional(dev, "cmn_refclk_dig_div"); in cdns_sierra_phy_get_clocks()
1159 dev_err(dev, "cmn_refclk_dig_div clock not found\n"); in cdns_sierra_phy_get_clocks()
1163 sp->input_clks[CMN_REFCLK_DIG_DIV] = clk; in cdns_sierra_phy_get_clocks()
1263 clk_set_rate(sp->input_clks[CMN_REFCLK_DIG_DIV], 25000000); in cdns_sierra_phy_configure_multilink()
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| /linux-6.12.1/arch/arm64/boot/dts/ti/ |
| D | k3-j721e-main.dtsi | 753 clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div",
813 clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div",
873 clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div",
933 clock-names = "cmn_refclk_dig_div", "cmn_refclk1_dig_div",
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