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/linux-6.12.1/Documentation/devicetree/bindings/input/
Dsyna,rmi4.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jason A. Donenfeld <Jason@zx2c4.com>
11 - Matthias Schiffer <matthias.schiffer@ew.tq-group.com
12 - Vincent Huang <vincent.huang@tw.synaptics.com>
22 - syna,rmi4-i2c
23 - syna,rmi4-spi
28 '#address-cells':
31 '#size-cells':
[all …]
/linux-6.12.1/drivers/input/rmi4/
Drmi_2d_sensor.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2011-2016 Synaptics Incorporated
16 #define RMI_2D_REL_POS_MIN -128
26 struct rmi_2d_axis_alignment *axis_align = &sensor->axis_align; in rmi_2d_sensor_abs_process()
29 if (obj->type == RMI_2D_OBJECT_NONE) in rmi_2d_sensor_abs_process()
32 if (axis_align->flip_x) in rmi_2d_sensor_abs_process()
33 obj->x = sensor->max_x - obj->x; in rmi_2d_sensor_abs_process()
35 if (axis_align->flip_y) in rmi_2d_sensor_abs_process()
36 obj->y = sensor->max_y - obj->y; in rmi_2d_sensor_abs_process()
38 if (axis_align->swap_axes) in rmi_2d_sensor_abs_process()
[all …]
/linux-6.12.1/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_util.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
4 * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
15 #define REG_MASK(n) ((BIT(n)) - 1)
41 * struct dpu_hw_blk - opaque hardware block object
52 * @ clip: clip shift
57 * @ thr_high: high threshold
59 * @ adjust_a: A-coefficients for mapping curve
60 * @ adjust_b: B-coefficients for mapping curve
61 * @ adjust_c: C-coefficients for mapping curve
[all …]
/linux-6.12.1/drivers/net/wireless/broadcom/b43/
Dphy_n.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 /* N-PHY registers. */
18 #define B43_NPHY_4WI_ADDR B43_PHY_N(0x00B) /* Four-wire bus address */
19 #define B43_NPHY_4WI_DATAHI B43_PHY_N(0x00C) /* Four-wire bus data high */
20 #define B43_NPHY_4WI_DATALO B43_PHY_N(0x00D) /* Four-wire bus data low */
21 #define B43_NPHY_BIST_STAT0 B43_PHY_N(0x00E) /* Built-in self test status 0 */
22 #define B43_NPHY_BIST_STAT1 B43_PHY_N(0x00F) /* Built-in self test status 1 */
26 #define B43_NPHY_C1_BCLIPBKOFF B43_PHY_N(0x01A) /* Core 1 barely clip backoff */
27 #define B43_NPHY_C1_CCK_BCLIPBKOFF B43_PHY_N(0x01B) /* Core 1 CCK barely clip backoff */
31 #define B43_NPHY_C1_CGAINI_CLIPGBKOFF 0x03E0 /* Clip gain backoff */
[all …]
/linux-6.12.1/arch/arm64/boot/dts/qcom/
Dsdm845-xiaomi-polaris.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include <dt-bindings/input/linux-event-codes.h>
13 #include <dt-bindings/sound/qcom,q6afe.h>
14 #include <dt-bindings/sound/qcom,q6asm.h>
16 #include "sdm845-wcd9340.dtsi"
25 /delete-node/ &rmtfs_mem;
[all …]
Dmsm8994-msft-lumia-octagon.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/gpio-keys.h>
14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
20 /delete-node/ &adsp_mem;
21 /delete-node/ &audio_mem;
22 /delete-node/ &cont_splash_mem;
23 /delete-node/ &mba_mem;
24 /delete-node/ &mpss_mem;
25 /delete-node/ &peripheral_region;
[all …]
/linux-6.12.1/arch/arm/boot/dts/qcom/
Dqcom-msm8974pro-oneplus-bacon.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-msm8974pro.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 chassis-type = "handset";
12 qcom,msm-id = <194 0x10000>;
13 qcom,board-id = <8 0>;
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
[all …]
/linux-6.12.1/arch/arm/boot/dts/nvidia/
Dtegra30-lg-p880.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-lg-x3.dtsi"
16 pinctrl-names = "default";
17 pinctrl-0 = <&state_default>;
21 host-wlan-wake {
26 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
29 /* GNSS UART-B pinmux */
30 uartb-rxd {
35 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
[all …]
Dtegra30-lg-p895.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra30-lg-x3.dtsi"
11 pinctrl-names = "default";
12 pinctrl-0 = <&state_default>;
15 /* GNSS UART-B pinmux */
16 uartb-cts-rxd {
22 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
24 uartb-rts-txd {
30 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
[all …]
Dtegra30-lg-x3.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/gpio-keys.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include <dt-bindings/mfd/max77620.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #include "tegra30-cpu-opp.dtsi"
11 #include "tegra30-cpu-opp-microvolt.dtsi"
14 chassis-type = "handset";
30 * pre-existing /chosen node to be available to insert the
[all …]
/linux-6.12.1/drivers/media/i2c/
Dov8858.c1 // SPDX-License-Identifier: GPL-2.0
22 #include <media/media-entity.h>
23 #include <media/v4l2-async.h>
24 #include <media/v4l2-common.h>
25 #include <media/v4l2-ctrls.h>
26 #include <media/v4l2-device.h>
27 #include <media/v4l2-event.h>
28 #include <media/v4l2-fwnode.h>
29 #include <media/v4l2-mediabus.h>
30 #include <media/v4l2-subdev.h>
[all …]
Dov772x.c1 // SPDX-License-Identifier: GPL-2.0
12 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
26 #include <linux/v4l2-mediabus.h>
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-device.h>
33 #include <media/v4l2-event.h>
34 #include <media/v4l2-fwnode.h>
35 #include <media/v4l2-image-sizes.h>
36 #include <media/v4l2-subdev.h>
41 #define GAIN 0x00 /* AGC - Gain control gain setting */
[all …]
/linux-6.12.1/drivers/video/fbdev/
Dcyber2000fb.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 1998-2000 Russell King
80 #define PCI_BM_CTL_ENABLE 0x01 /* enable bus-master */
247 #define HOR_PHASE_SHIFT 0xc2 /* high 3 bits */
249 #define EXT_SRC_HEIGHT 0xc4 /* high 6 bits */
250 #define EXT_X_START 0xc5 /* ext->screen, 16 bits */
251 #define EXT_X_END 0xc7 /* ext->screen, 16 bits */
252 #define EXT_Y_START 0xc9 /* ext->screen, 16 bits */
253 #define EXT_Y_END 0xcb /* ext->screen, 16 bits */
256 #define EXT_DDA_X_INIT 0xd1 /* ext->screen 16 bits */
[all …]
Datafb.c2 * linux/drivers/video/atafb.c -- Atari builtin chipset frame buffer device
11 * - 03 Jan 95: Original version by Martin Schaller: The TT driver and
13 * - 09 Jan 95: Roman: I've added the hardware abstraction (hw_switch)
16 * - 07 May 95: Martin: Added colormap operations for the external driver
17 * - 21 May 95: Martin: Added support for overscan
19 * - Jul 95: Guenther Kelleter <guenther@pool.informatik.rwth-aachen.de>:
23 * - 27 Dec 95: Guenther: Implemented user definable video modes "user[0-7]"
25 * "R<x>;<y>;<depth>". (Makes sense only on Falcon)
28 * - 23 Sep 97: Juergen: added xres_virtual for cards like ProMST
29 * The external-part is legacy, therefore hardware-specific
[all …]
/linux-6.12.1/drivers/media/platform/st/sti/hva/
Dhva-h264.c1 // SPDX-License-Identifier: GPL-2.0
9 #include "hva-hw.h"
32 /* source buffer copy in YUV 420 MB-tiled format with size=16*256*3/2 */
41 /* factor for bitrate and cpb buffer size max values if profile >= high */
44 /* factor for bitrate and cpb buffer size max values if profile < high */
200 * @brc_type: selects the bit-rate control algorithm
205 * @non_VCL_NALU_Size: size of non-VCL NALUs (SPS, PPS, filler),
213 * @delay: End-to-End Initial Delay
251 * Bit 0-6 used for qp offset (value -64 to 63).
265 * YUV for the Y component.
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/core/
Ddc_resource.c2 * Copyright 2012-15 Advanced Micro Devices, Inc.
95 dc->ctx->logger
100 #define UNABLE_TO_SPLIT -1
230 init_data->num_virtual_links, dc); in dc_create_resource_pool()
234 init_data->num_virtual_links, dc); in dc_create_resource_pool()
238 init_data->num_virtual_links, dc); in dc_create_resource_pool()
243 init_data->num_virtual_links, dc); in dc_create_resource_pool()
247 init_data->num_virtual_links, dc); in dc_create_resource_pool()
251 init_data->num_virtual_links, dc); in dc_create_resource_pool()
255 init_data->num_virtual_links, dc); in dc_create_resource_pool()
[all …]
/linux-6.12.1/drivers/staging/media/ipu3/include/uapi/
Dintel-ipu3.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /* Copyright (C) 2017 - 2018 Intel Corporation */
11 /* Vendor specific - used for IPU3 camera sub-system */
17 /* from include/uapi/linux/v4l2-controls.h */
26 #define IPU3_UAPI_GRID_START_MASK ((1 << 12) - 1)
34 * struct ipu3_uapi_grid_config - Grid plane config
51 * @y_start: Y value of top left corner of ROI
53 * @y_end: Y value of bottom right corner of ROI
56 * create a grid-based output, and the data is then divided into "slices".
71 * struct ipu3_uapi_awb_set_item - Memory layout for each cell in AWB
[all …]
/linux-6.12.1/drivers/media/platform/qcom/venus/
Dhfi_plat_bufs_v6.c1 // SPDX-License-Identifier: GPL-2.0-only
88 * size for high resolution
117 u32 x, y, z; in size_h265d_lb_se_left_ctrl() local
119 x = ((height + 16 - 1) / 8) * MAX_SE_NBR_CTRL_LCU16_LINE_BUFFER_SIZE; in size_h265d_lb_se_left_ctrl()
120 y = ((height + 32 - 1) / 8) * MAX_SE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE; in size_h265d_lb_se_left_ctrl()
121 z = ((height + 64 - 1) / 8) * MAX_SE_NBR_CTRL_LCU64_LINE_BUFFER_SIZE; in size_h265d_lb_se_left_ctrl()
123 return max3(x, y, z); in size_h265d_lb_se_left_ctrl()
144 * for high resolution
154 u32 x, y, z; in size_vpxd_lb_fe_left_ctrl() local
157 y = ((height + 31) >> 5) * MAX_FE_NBR_CTRL_LCU32_LINE_BUFFER_SIZE; in size_vpxd_lb_fe_left_ctrl()
[all …]
/linux-6.12.1/drivers/media/usb/gspca/
Dstk1135.c1 // SPDX-License-Identifier: GPL-2.0-or-later
45 /* -- read a register -- */
48 struct usb_device *dev = gspca_dev->dev; in reg_r()
51 if (gspca_dev->usb_err < 0) in reg_r()
58 gspca_dev->usb_buf, 1, in reg_r()
62 index, gspca_dev->usb_buf[0]); in reg_r()
65 gspca_dev->usb_err = ret; in reg_r()
69 return gspca_dev->usb_buf[0]; in reg_r()
72 /* -- write a register -- */
76 struct usb_device *dev = gspca_dev->dev; in reg_w()
[all …]
Dspca508.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2009 Jean-Francois Moine <http://moinejf.free.fr>
58 * Initialization data: this is the first set-up data written to the
67 /* READ {0x0000, 0x8114} -> 0000: 00 */
79 /* --------------------------------------- */
82 /* --------------------------------------- */
91 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
92 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
96 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
97 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
[all …]
/linux-6.12.1/drivers/net/wireless/intel/iwlegacy/
Dcommon.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
8 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 #define IL_ERR(f, a...) dev_err(&il->pci_dev->dev, f, ## a)
32 #define IL_WARN(f, a...) dev_warn(&il->pci_dev->dev, f, ## a)
33 #define IL_WARN_ONCE(f, a...) dev_warn_once(&il->pci_dev->dev, f, ## a)
34 #define IL_INFO(f, a...) dev_info(&il->pci_dev->dev, f, ## a)
46 #define U32_PAD(n) ((4-(n))&0x3)
48 /* CT-KILL constants */
56 * Use default noise value of -127 ... this is below the range of measurable
[all …]
/linux-6.12.1/drivers/video/fbdev/riva/
Dfbdev.c2 * linux/drivers/video/riva/fbdev.c - nVidia RIVA 128/TNT/TNT2 fb driver
6 * Copyright 1999-2000 Jeff Garzik
56 /* ------------------------------------------------------------------------- *
60 * ------------------------------------------------------------------------- */
91 /* ------------------------------------------------------------------------- *
95 * ------------------------------------------------------------------------- */
99 /* ------------------------------------------------------------------------- *
103 * ------------------------------------------------------------------------- */
195 /* ------------------------------------------------------------------------- *
199 * ------------------------------------------------------------------------- */
[all …]
/linux-6.12.1/drivers/gpu/drm/msm/registers/adreno/
Da6xx.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
9 <!--
12 - "cmd" - the register is used outside of renderpass and blits,
14 - "rp_blit" - the register is used inside renderpass or blits
21 -->
23 <!-- these might be same as a5xx -->
39 <value value="0x0c" name="FMT6_1_5_5_5_UNORM"/> <!-- read only -->
60 <value value="0x31" name="FMT6_8_8_8_X8_UNORM"/> <!-- samples 1 for alpha -->
[all …]
Da5xx.xml1 <?xml version="1.0" encoding="UTF-8"?>
3 xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
4 xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
32 <value value="0x37" name="RB5_R10G10B10A2_UNORM"/> <!-- GL_RGB10_A2 -->
33 <value value="0x3a" name="RB5_R10G10B10A2_UINT"/> <!-- GL_RGB10_A2UI -->
34 <value value="0x42" name="RB5_R11G11B10_FLOAT"/> <!-- GL_R11F_G11F_B10F -->
251 <value value="8" name="BLIT_ZS"/> <!-- depth or combined depth+stencil -->
252 <value value="9" name="BLIT_S"/> <!-- separate stencil -->
255 <!-- see comment in a4xx.xml about script to extract countables from test-perf output -->
851 <!-- CP Interrupt bits -->
[all …]
/linux-6.12.1/drivers/gpu/drm/amd/display/dc/hwss/dce110/
Ddce110_hwseq.c74 * For eDP, after power-up/power/down,
84 hws->ctx
87 ctx->logger
89 struct dc_context *ctx = dc->ctx
92 hws->regs->reg
96 hws->shifts->field_name, hws->masks->field_name
104 .crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
107 .crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
110 .crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
113 .crtc = (mmCRTCV_GSL_CONTROL - mmCRTC_GSL_CONTROL),
[all …]

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