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/linux-6.12.1/Documentation/devicetree/bindings/mmc/
Drockchip-dw-mshc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 controller that are not already included in the synopsys-dw-mshc-common.yaml
17 - $ref: synopsys-dw-mshc-common.yaml#
20 - Heiko Stuebner <heiko@sntech.de>
27 - const: rockchip,rk2928-dw-mshc
29 - const: rockchip,rk3288-dw-mshc
30 - items:
[all …]
Dhisilicon,hi3798cv200-dw-mshc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/hisilicon,hi3798cv200-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yang Xiwen <forbidden405@outlook.com>
15 - hisilicon,hi3798cv200-dw-mshc
16 - hisilicon,hi3798mv200-dw-mshc
26 - description: bus interface unit clock
27 - description: card interface unit clock
28 - description: card input sample phase clock
[all …]
Dsynopsys-dw-mshc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
16 - altr,socfpga-dw-mshc
17 - img,pistachio-dw-mshc
18 - snps,dw-mshc
30 Handle to "biu" and "ciu" clocks for the
33 clock-names:
[all …]
/linux-6.12.1/drivers/mmc/host/
Ddw_mmc-hi3798cv200.c1 // SPDX-License-Identifier: GPL-2.0
17 #include "dw_mmc-pltfm.h"
28 struct hi3798cv200_priv *priv = host->priv; in dw_mci_hi3798cv200_set_ios()
32 if (ios->timing == MMC_TIMING_MMC_DDR52 || in dw_mci_hi3798cv200_set_ios()
33 ios->timing == MMC_TIMING_UHS_DDR50) in dw_mci_hi3798cv200_set_ios()
40 if (ios->timing == MMC_TIMING_MMC_DDR52) in dw_mci_hi3798cv200_set_ios()
47 if (ios->timing == MMC_TIMING_MMC_HS400) in dw_mci_hi3798cv200_set_ios()
53 if (ios->timing == MMC_TIMING_MMC_HS || in dw_mci_hi3798cv200_set_ios()
54 ios->timing == MMC_TIMING_LEGACY) in dw_mci_hi3798cv200_set_ios()
55 clk_set_phase(priv->drive_clk, 180); in dw_mci_hi3798cv200_set_ios()
[all …]
Ddw_mmc-hi3798mv200.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Modified from dw_mmc-hi3798cv200.c
18 #include "dw_mmc-pltfm.h"
38 struct dw_mci_hi3798mv200_priv *priv = host->priv; in dw_mci_hi3798mv200_set_ios()
39 struct mmc_clk_phase phase = priv->phase_map.phase[ios->timing]; in dw_mci_hi3798mv200_set_ios()
43 if (ios->timing == MMC_TIMING_MMC_DDR52 in dw_mci_hi3798mv200_set_ios()
44 || ios->timing == MMC_TIMING_UHS_DDR50) in dw_mci_hi3798mv200_set_ios()
51 if (ios->timing == MMC_TIMING_MMC_HS400) in dw_mci_hi3798mv200_set_ios()
57 if (clk_set_rate(host->ciu_clk, ios->clock)) in dw_mci_hi3798mv200_set_ios()
58 dev_warn(host->dev, "Failed to set rate to %u\n", ios->clock); in dw_mci_hi3798mv200_set_ios()
[all …]
Ddw_mmc-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/mmc/slot-gpio.h>
16 #include "dw_mmc-pltfm.h"
41 * Each fine delay is between 44ps-77ps. Assume each fine delay is 60ps to
46 unsigned long rate = clk_get_rate(host->ciu_clk); in rockchip_mmc_get_internal_phase()
78 struct dw_mci_rockchip_priv_data *priv = host->priv; in rockchip_mmc_get_phase()
79 struct clk *clock = sample ? priv->sample_clk : priv->drv_clk; in rockchip_mmc_get_phase()
81 if (priv->internal_phase) in rockchip_mmc_get_phase()
89 unsigned long rate = clk_get_rate(host->ciu_clk); in rockchip_mmc_set_internal_phase()
108 dev_err(host->dev, "%s: invalid clk rate\n", __func__); in rockchip_mmc_set_internal_phase()
[all …]
/linux-6.12.1/arch/arm/boot/dts/rockchip/
Drv1108.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/rv1108-cru.h>
7 #include <dt-bindings/pinctrl/rockchip.h>
8 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
15 interrupt-parent = <&gic>;
[all …]
Drv1126.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rv1126-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rockchip,rv1126-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
15 #address-cells = <1>;
16 #size-cells = <1>;
[all …]
Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
9 #include <dt-bindings/power/rk3036-power.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
Drk322x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3228-cru.h>
8 #include <dt-bindings/thermal/thermal.h>
9 #include <dt-bindings/power/rk3228-power.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
[all …]
Drk3288.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3288-cru.h>
8 #include <dt-bindings/power/rk3288-power.h>
9 #include <dt-bindings/thermal/thermal.h>
10 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #address-cells = <2>;
[all …]
Drk3128.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/rk3128-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3128-power.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/rockchip/
Drk3328.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3328-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3328-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]
Drk3308.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/clock/rk3308-cru.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
[all …]
Drk3368.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3368-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3368-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
[all …]
Dpx30.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/px30-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/px30-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]
Drk3399-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3399-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3399-power.h>
12 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
[all …]
Drk356x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3568-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
[all …]
Drk3588-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3588-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/power/rk3588-power.h>
10 #include <dt-bindings/reset/rockchip,rk3588-cru.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/ata/ahci.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
[all …]
/linux-6.12.1/arch/arm64/boot/dts/hisilicon/
Dhi3798cv200.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
8 #include <dt-bindings/clock/histb-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/reset/ti-syscon.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
/linux-6.12.1/arch/arm/boot/dts/samsung/
Dexynos5420-peach-pit.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pit-rev16",
[all …]
Dexynos5800-peach-pi.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pi-rev16",
[all …]
Dexynos5250-snow-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/samsung-i2s.h>
30 stdout-path = "serial3:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
35 pinctrl-names = "default";
[all …]
Dexynos5250-spring.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/input/input.h>
19 chassis-type = "laptop";
33 stdout-path = "serial3:115200n8";
36 gpio-keys {
37 compatible = "gpio-keys";
[all …]
/linux-6.12.1/arch/mips/boot/dts/img/
Dpistachio.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/pistachio-clk.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/mips-gic.h>
11 #include <dt-bindings/reset/pistachio-resets.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
22 #address-cells = <1>;
[all …]

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