Home
last modified time | relevance | path

Searched +full:can +full:- +full:r8a7791 (Results 1 – 23 of 23) sorted by relevance

/linux-6.12.1/arch/arm/boot/dts/renesas/
Dr8a7791.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7791-sysc.h>
16 compatible = "renesas,r8a7791";
17 #address-cells = <2>;
[all …]
Dr8a7791-koelsch.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
11 * SSI-AK4643
23 * You can use Mute
28 * You can use Volume Ramp
38 /dts-v1/;
39 #include "r8a7791.dtsi"
40 #include <dt-bindings/gpio/gpio.h>
41 #include <dt-bindings/input/input.h>
45 compatible = "renesas,koelsch", "renesas,r8a7791";
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/net/can/
Drenesas,rcar-can.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/can/renesas,rcar-can.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car CAN Controller
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
15 - items:
16 - enum:
17 - renesas,can-r8a7778 # R-Car M1-A
18 - renesas,can-r8a7779 # R-Car H1
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/iio/adc/
Drenesas,rcar-gyroadc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/renesas,rcar-gyroadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car GyroADC
10 - Marek Vasut <marek.vasut+renesas@gmail.com>
15 are sampled by the GyroADC block in a round-robin fashion and the result
23 - enum:
24 - renesas,r8a7791-gyroadc
25 - renesas,r8a7792-gyroadc
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/media/
Drenesas,jpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>
15 JPU can encode image data and decode JPEG data quickly.
20 - enum:
21 - renesas,jpu-r8a7790 # R-Car H2
22 - renesas,jpu-r8a7791 # R-Car M2-W
23 - renesas,jpu-r8a7792 # R-Car V2H
24 - renesas,jpu-r8a7793 # R-Car M2-N
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/timer/
Drenesas,cmt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
14 The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock
18 are independent. A particular CMT instance can implement only a subset of the
26 - items:
27 - enum:
28 - renesas,r8a7740-cmt0 # 32-bit CMT0 on R-Mobile A1
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Drenesas,cpg-mssr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/renesas,cpg-mssr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse Generator)
18 - The CPG block generates various core clocks,
19 - The MSSR block provides two functions:
27 - renesas,r7s9210-cpg-mssr # RZ/A2
28 - renesas,r8a7742-cpg-mssr # RZ/G1H
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/display/bridge/
Drenesas,lvds.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car LVDS Encoder
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 These DT bindings describe the LVDS encoder embedded in the Renesas R-Car
14 Gen2, R-Car Gen3, RZ/G1 and RZ/G2 SoCs.
19 - renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders
20 - renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders
21 - renesas,r8a7744-lvds # for RZ/G1N compatible LVDS encoders
[all …]
/linux-6.12.1/drivers/watchdog/
Drenesas_wdt.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-17 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
6 * Copyright (C) 2015-17 Renesas Electronics Corporation
37 DIV_ROUND_UP((d) * (p)->clk_rate, clk_divs[(p)->cks])
39 /* d is 16 bit, clk_divs 12 bit -> no 32 bit overflow */
40 #define DIV_BY_CLKS_PER_SEC(p, d) ((d) * clk_divs[(p)->cks] / (p)->clk_rate)
64 writel_relaxed(val, priv->base + reg); in rwdt_write()
71 rwdt_write(priv, 65536 - MUL_BY_CLKS_PER_SEC(priv, wdev->timeout), RWTCNT); in rwdt_init_timeout()
80 delay = DIV_ROUND_UP(cycles * 1000000, priv->clk_rate); in rwdt_wait_cycles()
90 pm_runtime_get_sync(wdev->parent); in rwdt_start()
[all …]
/linux-6.12.1/drivers/mmc/host/
Drenesas_sdhi_sys_dmac.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-19 Renesas Electronics Corporation
6 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
8 * Copyright (C) 2010-2011 Guennadi Liakhovetski
12 #include <linux/dma-mapping.h>
76 { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
77 { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
78 { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
79 { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
80 { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
[all …]
/linux-6.12.1/drivers/phy/renesas/
Dphy-rcar-gen2.c1 // SPDX-License-Identifier: GPL-2.0
3 * Renesas R-Car Gen2 PHY driver
79 struct rcar_gen2_channel *channel = phy->channel; in rcar_gen2_phy_init()
80 struct rcar_gen2_phy_driver *drv = channel->drv; in rcar_gen2_phy_init()
88 * driver. Achieving this with cmpxcgh() should be SMP-safe. in rcar_gen2_phy_init()
90 if (cmpxchg(&channel->selected_phy, -1, phy->number) != -1) in rcar_gen2_phy_init()
91 return -EBUSY; in rcar_gen2_phy_init()
93 clk_prepare_enable(drv->clk); in rcar_gen2_phy_init()
95 spin_lock_irqsave(&drv->lock, flags); in rcar_gen2_phy_init()
96 ugctrl2 = readl(drv->base + USBHS_UGCTRL2); in rcar_gen2_phy_init()
[all …]
/linux-6.12.1/drivers/pci/controller/
Dpcie-rcar-host.c1 // SPDX-License-Identifier: GPL-2.0
3 * PCIe driver for Renesas R-Car SoCs
4 * Copyright (C) 2014-2020 Renesas Electronics Europe Ltd
7 * arch/sh/drivers/pci/pcie-sh7786.c
8 * arch/sh/drivers/pci/ops-sh7786.c
9 * Copyright (C) 2009 - 2011 Paul Mundt
16 #include <linux/clk-provider.h>
34 #include "pcie-rcar.h"
65 ret = -EINVAL; in rcar_pcie_wakeup()
75 * which it can return to L0s/L0 on its own. in rcar_pcie_wakeup()
[all …]
/linux-6.12.1/drivers/net/can/rcar/
Drcar_can.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Renesas R-Car CAN device driver
16 #include <linux/can/dev.h>
33 * mailbox 60 - 63 - Rx FIFO mailboxes
34 * mailbox 56 - 59 - Tx FIFO mailboxes
35 * non-FIFO mailboxes are not used
37 #define RCAR_CAN_N_MBX 64 /* Number of mailboxes in non-FIFO mode */
38 #define RCAR_CAN_RX_FIFO_MBX 60 /* Mailbox - window to Rx FIFO */
39 #define RCAR_CAN_TX_FIFO_MBX 56 /* Mailbox - window to Tx FIFO */
46 u8 dlc; /* Data Length Code - bits [0..3] */
[all …]
/linux-6.12.1/drivers/i2c/busses/
Di2c-sh_mobile.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-19 Wolfram Sang <wsa@sang-engineering.com>
8 * Portions of the code based on out-of-tree driver i2c-sh7343.c
15 #include <linux/dma-mapping.h>
40 /* ICIC: -DTE */
47 /* ICIC: -DTE */
51 /* 3 bytes or more, +---------+ gets repeated */
56 /* 0 byte receive - not supported since slave may hold SDA low */
61 /* ICIC: -DTE | +DTE */
68 /* ICIC: -DTE | +DTE */
[all …]
Di2c-rcar.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the Renesas R-Car I2C unit
5 * Copyright (C) 2014-19 Wolfram Sang <wsa@sang-engineering.com>
6 * Copyright (C) 2011-2019 Renesas Electronics Corporation
8 * Copyright (C) 2012-14 Renesas Solutions Corp.
11 * This file is based on the drivers/i2c/busses/i2c-sh7760.c
12 * (c) 2005-2008 MSC Vertriebsges.m.b.H, Manuel Lauss <mlau@msc-ge.com>
18 #include <linux/dma-mapping.h>
24 #include <linux/i2c-smbus.h>
58 #define MDBS BIT(7) /* non-fifo mode switch */
[all …]
/linux-6.12.1/arch/arm/
DKconfig.debug1 # SPDX-License-Identifier: GPL-2.0
44 once the kernel has booted up - it's a one time check.
96 When a user program crashes due to an exception, the kernel can
104 1 - undefined instruction events
105 2 - system calls
106 4 - invalid data aborts
107 8 - SIGSEGV faults
108 16 - SIGBUS faults
112 bool "Kernel low-level debugging functions (read help!)"
125 prompt "Kernel low-level debugging port"
[all …]
/linux-6.12.1/drivers/clk/renesas/
Drenesas-cpg-mssr.c1 // SPDX-License-Identifier: GPL-2.0
7 * Based on clk-mstp.c, clk-rcar-gen2.c, and clk-rcar-gen3.c
14 #include <linux/clk-provider.h>
28 #include <linux/reset-controller.h>
31 #include <dt-bindings/clock/renesas-cpg-mssr.h>
33 #include "renesas-cpg-mssr.h"
34 #include "clk-div6.h"
46 * If the registers exist, these are valid for SH-Mobile, R-Mobile,
47 * R-Car Gen2, R-Car Gen3, and RZ/G1.
48 * These are NOT valid for R-Car Gen1 and RZ/A1!
[all …]
/linux-6.12.1/drivers/gpu/drm/renesas/rcar-du/
Drcar_lvds.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car LVDS Encoder
5 * Copyright (C) 2013-2018 Renesas Electronics Corporation
13 #include <linux/media-bus-format.h>
54 #define RCAR_LVDS_QUIRK_DUAL_LINK BIT(4) /* Supports dual-link operation */
88 return ioread32(lvds->mmio + reg); in rcar_lvds_read()
93 iowrite32(data, lvds->mmio + reg); in rcar_lvds_write()
96 /* -----------------------------------------------------------------------------
157 * The LVDS PLL is made of a pre-divider and a multiplier (strangely in rcar_lvds_d3_e3_pll_calc()
158 * enough called M and N respectively), followed by a post-divider E. in rcar_lvds_d3_e3_pll_calc()
[all …]
/linux-6.12.1/drivers/pinctrl/renesas/
Dcore.c1 // SPDX-License-Identifier: GPL-2.0
8 * Copyright (C) 2009 - 2012 Paul Mundt
11 #define DRV_NAME "sh-pfc"
47 return -EINVAL; in sh_pfc_map_resources()
54 windows = devm_kcalloc(pfc->dev, num_windows, sizeof(*windows), in sh_pfc_map_resources()
57 return -ENOMEM; in sh_pfc_map_resources()
59 pfc->num_windows = num_windows; in sh_pfc_map_resources()
60 pfc->windows = windows; in sh_pfc_map_resources()
63 irqs = devm_kcalloc(pfc->dev, num_irqs, sizeof(*irqs), in sh_pfc_map_resources()
66 return -ENOMEM; in sh_pfc_map_resources()
[all …]
Dpfc-r8a7791.c1 // SPDX-License-Identifier: GPL-2.0
3 * r8a7791/r8a7743 processor support - PFC hardware block.
6 * Copyright (C) 2014-2017 Cogent Embedded, Inc.
15 * Pins 0-23 assigned to GPIO bank 6 can be used for SD interfaces in
1736 /* - ADI -------------------------------------------------------------------- */
1803 /* - Audio Clock ------------------------------------------------------------ */
1849 /* - AVB -------------------------------------------------------------------- */
1925 /* - CAN -------------------------------------------------------------------- */
2053 /* - DU --------------------------------------------------------------------- */
2161 /* - ETH -------------------------------------------------------------------- */
[all …]
/linux-6.12.1/drivers/spi/
Dspi-sh-msiof.c1 // SPDX-License-Identifier: GPL-2.0
7 * Copyright (C) 2014-2017 Glider bvba
14 #include <linux/dma-mapping.h>
89 #define SIMDR1_SYNCAC_SHIFT 25 /* Sync Polarity (1 = Active-low) */
93 #define SIMDR1_FLD_MASK GENMASK(3, 2) /* Frame Sync Signal Interval (0-3) */
102 #define SIMDR2_BITLEN1(i) (((i) - 1) << 24) /* Data Size (8-32 bits) */
103 #define SIMDR2_WDLEN1(i) (((i) - 1) << 16) /* Word Count (1-64/256 (SH, A1))) */
107 #define SISCR_BRPS_MASK GENMASK(12, 8) /* Prescaler Setting (1-32) */
108 #define SISCR_BRPS(i) (((i) - 1) << 8)
129 #define SICTR_TXDIZ_HIZ (2 << 22) /* High-impedance */
[all …]
/linux-6.12.1/drivers/media/platform/renesas/
Drcar_jpu.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2014-2015 Cogent Embedded, Inc. <source@cogentembedded.com>
5 * Copyright (C) 2014-2015 Renesas Electronics Corporation
7 * This is based on the drivers/media/platform/samsung/s5p-jpeg driver by
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-device.h>
33 #include <media/v4l2-event.h>
34 #include <media/v4l2-fh.h>
35 #include <media/v4l2-mem2mem.h>
36 #include <media/v4l2-ioctl.h>
[all …]
/linux-6.12.1/drivers/net/ethernet/renesas/
Dsh_eth.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2006-2012 Nobuhiro Iwamatsu
6 * Copyright (C) 2008-2014 Renesas Solutions Corp.
7 * Copyright (C) 2013-2017 Cogent Embedded, Inc.
15 #include <linux/dma-mapping.h>
19 #include <linux/mdio-bitbang.h>
44 [0 ... SH_ETH_MAX_REGISTER_OFFSET - 1] = SH_ETH_OFFSET_INVALID
53 __diag_ignore_all("-Woverride-init",
350 u16 offset = mdp->reg_offset[enum_index]; in sh_eth_write()
355 iowrite32(data, mdp->addr + offset); in sh_eth_write()
[all …]