| /linux-6.12.1/Documentation/devicetree/bindings/i2c/ |
| D | nvidia,tegra186-bpmp-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra186-bpmp-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 (and later) BPMP I2C controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 In Tegra186 and later, the BPMP (Boot and Power Management Processor)
16 management I2C bus. Software running on other CPUs must perform IPC to
17 the BPMP in order to execute transactions on that I2C bus. This
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| /linux-6.12.1/Documentation/devicetree/bindings/firmware/ |
| D | nvidia,tegra186-bpmp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/nvidia,tegra186-bpmp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra Boot and Power Management Processor (BPMP)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The BPMP is a specific processor in Tegra chip, which is designed for
17 defines the resources that would be used by the BPMP firmware driver,
19 CPU and BPMP.
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| /linux-6.12.1/Documentation/devicetree/bindings/pci/ |
| D | nvidia,tegra194-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Vidya Sagar <vidyas@nvidia.com>
16 inherits all the common properties defined in snps,dw-pcie.yaml. Some of
20 See nvidia,tegra194-pcie-ep.yaml for details on the Endpoint mode device
26 - nvidia,tegra194-pcie
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| D | nvidia,tegra194-pcie-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Vidya Sagar <vidyas@nvidia.com>
16 inherits all the common properties defined in snps,dw-pcie-ep.yaml. Some
23 Note: On Tegra194's P2972-0000 platform, only C5 controller can be enabled to
29 - nvidia,tegra194-pcie-ep
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| D | nvidia,tegra20-pcie.txt | 4 - compatible: Must be:
5 - "nvidia,tegra20-pcie": for Tegra20
6 - "nvidia,tegra30-pcie": for Tegra30
7 - "nvidia,tegra124-pcie": for Tegra124 and Tegra132
8 - "nvidia,tegra210-pcie": for Tegra210
9 - "nvidia,tegra186-pcie": for Tegra186
10 - power-domains: To ungate power partition by BPMP powergate driver. Must
11 contain BPMP phandle and PCIe power partition ID. This is required only
13 - device_type: Must be "pci"
14 - reg: A list of physical base address and length for each set of controller
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| /linux-6.12.1/drivers/i2c/busses/ |
| D | i2c-tegra-bpmp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/i2c/busses/i2c-tegra-bpmp.c
19 #include <soc/tegra/bpmp-abi.h>
20 #include <soc/tegra/bpmp.h>
32 struct tegra_bpmp *bpmp; member
33 unsigned int bus; member
37 * Linux flags are translated to BPMP defined I2C flags that are used in BPMP
70 * [addr little-endian][flags little-endian][len little-endian][data if write]
71 * [addr little-endian][flags little-endian][len little-endian][data if write]
87 char *buf = request->xfer.data_buf; in tegra_bpmp_serialize_i2c_msg()
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| /linux-6.12.1/Documentation/devicetree/bindings/memory-controllers/ |
| D | nvidia,tegra186-mc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra186-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
16 handles memory requests for 40-bit virtual addresses from internal clients
27 pattern: "^memory-controller@[0-9a-f]+$"
31 - enum:
32 - nvidia,tegra186-mc
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| /linux-6.12.1/Documentation/devicetree/bindings/display/tegra/ |
| D | nvidia,tegra20-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra20-dsi
18 - nvidia,tegra30-dsi
19 - nvidia,tegra114-dsi
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| /linux-6.12.1/Documentation/devicetree/bindings/gpu/host1x/ |
| D | nvidia,tegra210-nvjpg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvjpg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 and newer chips. It is located on the Host1x bus and typically programmed
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvjpg@[0-9a-f]*$"
24 - nvidia,tegra210-nvjpg
25 - nvidia,tegra186-nvjpg
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| D | nvidia,tegra234-nvdec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra234-nvdec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 and newer chips. It is located on the Host1x bus and typically
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvdec@[0-9a-f]*$"
24 - nvidia,tegra234-nvdec
32 clock-names:
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| D | nvidia,tegra210-nvdec.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvdec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 and newer chips. It is located on the Host1x bus and typically
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvdec@[0-9a-f]*$"
24 - nvidia,tegra210-nvdec
25 - nvidia,tegra186-nvdec
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| D | nvidia,tegra210-nvenc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvenc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 and newer chips. It is located on the Host1x bus and typically
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvenc@[0-9a-f]*$"
24 - nvidia,tegra210-nvenc
25 - nvidia,tegra186-nvenc
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| /linux-6.12.1/include/soc/tegra/ |
| D | bpmp-abi.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
44 * @brief Messages sent to/from BPMP via IPC
56 * The CPU requests the BPMP to perform a particular service by
61 * The BPMP processes the data and replies with an IVC frame (on the
66 * A well-defined subset of the MRQ messages that the CPU sends to the
67 * BPMP can lead to BPMP eventually sending an MRQ message to the
69 * a thermal trip point, the BPMP may eventually send a single
79 * at BPMP. For requests originating in BPMP, this flag is optional except
130 * -BPMP_EBADMSG and ignore the request.
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| /linux-6.12.1/arch/arm64/boot/dts/nvidia/ |
| D | tegra194.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
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| D | tegra194-p3668.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
8 ethernet0 = "/bus@0/ethernet@2490000";
9 i2c0 = "/bpmp/i2c";
10 i2c1 = "/bus@0/i2c@3160000";
11 i2c2 = "/bus@0/i2c@c240000";
12 i2c3 = "/bus@0/i2c@3180000";
13 i2c4 = "/bus@0/i2c@3190000";
14 i2c5 = "/bus@0/i2c@31c0000";
15 i2c6 = "/bus@0/i2c@c250000";
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| D | tegra186.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
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| D | tegra234.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
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| D | tegra194-p2888.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
11 ethernet0 = "/bus@0/ethernet@2490000";
12 i2c0 = "/bpmp/i2c";
13 i2c1 = "/bus@0/i2c@3160000";
14 i2c2 = "/bus@0/i2c@c240000";
15 i2c3 = "/bus@0/i2c@3180000";
16 i2c4 = "/bus@0/i2c@3190000";
17 i2c5 = "/bus@0/i2c@31c0000";
18 i2c6 = "/bus@0/i2c@c250000";
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| D | tegra186-p3310.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
12 i2c0 = "/bpmp/i2c";
27 stdout-path = "serial0:115200n8";
38 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
40 phy-handle = <&phy>;
41 phy-mode = "rgmii";
44 #address-cells = <1>;
45 #size-cells = <0>;
47 phy: ethernet-phy@0 {
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| D | tegra234-p3740-0002+p3701-0008.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/sound/rt5640.h>
7 #include "tegra234-p3701-0008.dtsi"
11 compatible = "nvidia,p3740-0002+p3701-0008", "nvidia,p3701-0008", "nvidia,tegra234";
19 stdout-path = "serial0:115200n8";
22 bus@0 {
29 dai-format = "i2s";
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| D | tegra186-p3509-0000+p3636-0001.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/mfd/max77620.h>
12 compatible = "nvidia,p3509-0000+p3636-0001", "nvidia,tegra186";
16 i2c0 = "/bpmp/i2c";
30 stdout-path = "serial0:115200n8";
41 phy-reset-gpios = <&gpio_aon TEGRA186_AON_GPIO(AA, 6) GPIO_ACTIVE_LOW>;
42 phy-handle = <&phy>;
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| /linux-6.12.1/drivers/pci/controller/dwc/ |
| D | pcie-tegra194.c | 1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2019-2022 NVIDIA Corporation.
33 #include "pcie-designware.h"
34 #include <soc/tegra/bpmp.h>
35 #include <soc/tegra/bpmp-abi.h>
249 struct tegra_bpmp *bpmp; member
296 writel_relaxed(value, pcie->appl_base + reg); in appl_writel()
301 return readl_relaxed(pcie->appl_base + reg); in appl_readl()
306 struct dw_pcie *pci = &pcie->pci; in tegra_pcie_icc_set()
309 val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA); in tegra_pcie_icc_set()
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