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/linux-6.12.1/Documentation/devicetree/bindings/soc/imx/
Dfsl,imx8mm-vpu-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM VPU blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mm-vpu-blk-ctrl
21 - const: syscon
26 '#power-domain-cells':
[all …]
Dfsl,imx8mq-vpu-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MQ VPU blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MQ VPU blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mq-vpu-blk-ctrl
25 '#power-domain-cells':
28 power-domains:
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Dfsl,imx8mp-hsio-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MP HSIO blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to
14 the NoC and ensuring proper power sequencing of the high-speed IO
20 - const: fsl,imx8mp-hsio-blk-ctrl
21 - const: syscon
[all …]
Dfsl,imx8mp-hdmi-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MP HDMI blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mp-hdmi-blk-ctrl
21 - const: syscon
26 '#power-domain-cells':
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Dfsl,imx8mm-disp-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MM DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mm-disp-blk-ctrl
21 - const: syscon
26 '#power-domain-cells':
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Dfsl,imx8mn-disp-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8MN DISP blk-ctrl
10 - Lucas Stach <l.stach@pengutronix.de>
13 The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mn-disp-blk-ctrl
21 - const: syscon
26 '#power-domain-cells':
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Dfsl,imx93-media-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx93-media-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX93 Media blk-ctrl
10 - Peng Fan <peng.fan@nxp.com>
15 clocking, reset, and miscellaneous top-level controls for peripherals
21 - const: fsl,imx93-media-blk-ctrl
22 - const: syscon
27 '#power-domain-cells':
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Dfsl,imx8mp-media-blk-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Elder <paul.elder@ideasonboard.com>
13 The i.MX8MP Media Block Control (MEDIA BLK_CTRL) is a top-level peripheral
20 - const: fsl,imx8mp-media-blk-ctrl
21 - const: syscon
26 '#address-cells':
29 '#size-cells':
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/linux-6.12.1/Documentation/devicetree/bindings/display/bridge/
Dfsl,imx93-mipi-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx93-mipi-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
15 and extensions to them are controlled by i.MX93 media blk-ctrl.
18 - $ref: snps,dw-mipi-dsi.yaml#
22 const: fsl,imx93-mipi-dsi
26 - description: apb clock
27 - description: pixel clock
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Dfsl,ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
14 for configuring the on-SoC DPI-to-LVDS serializer. This describes
20 - fsl,imx6sx-ldb
21 - fsl,imx8mp-ldb
22 - fsl,imx93-ldb
27 clock-names:
33 reg-names:
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/linux-6.12.1/drivers/gpu/drm/arm/display/komeda/d71/
Dd71_component.c1 // SPDX-License-Identifier: GPL-2.0
60 static u32 get_valid_inputs(struct block_header *blk) in get_valid_inputs() argument
65 for (i = 0; i < PIPELINE_INFO_N_VALID_INPUTS(blk->pipeline_info); i++) { in get_valid_inputs()
66 get_resources_id(blk->input_ids[i], NULL, &comp_id); in get_valid_inputs()
117 if (!d71->periph_addr) in __get_blk_line_size()
125 return __get_blk_line_size(d71, reg, d71->max_line_size); in get_blk_line_size()
178 struct komeda_component_output *input = &st->inputs[idx]; in to_d71_input_id()
181 if (has_bit(idx, st->active_inputs)) in to_d71_input_id()
182 return input->component->hw_id + input->output_port; in to_d71_input_id()
191 struct drm_framebuffer *fb = &kfb->base; in d71_layer_update_fb()
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/linux-6.12.1/drivers/pmdomain/imx/
DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o
3 obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o
4 obj-$(CONFIG_IMX_SCU_PD) += scu-pd.o
5 obj-$(CONFIG_IMX8M_BLK_CTRL) += imx8m-blk-ctrl.o
6 obj-$(CONFIG_IMX8M_BLK_CTRL) += imx8mp-blk-ctrl.o
7 obj-$(CONFIG_SOC_IMX9) += imx93-pd.o
8 obj-$(CONFIG_IMX9_BLK_CTRL) += imx93-blk-ctrl.o
Dimx8m-blk-ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
19 #include <dt-bindings/power/imx8mm-power.h>
20 #include <dt-bindings/power/imx8mn-power.h>
21 #include <dt-bindings/power/imx8mp-power.h>
22 #include <dt-bindings/power/imx8mq-power.h>
53 * an if-statement should be used before setting and clearing this
88 const struct imx8m_blk_ctrl_domain_data *data = domain->data; in imx8m_blk_ctrl_power_on()
89 struct imx8m_blk_ctrl *bc = domain->bc; in imx8m_blk_ctrl_power_on()
93 ret = pm_runtime_get_sync(bc->bus_power_dev); in imx8m_blk_ctrl_power_on()
95 pm_runtime_put_noidle(bc->bus_power_dev); in imx8m_blk_ctrl_power_on()
[all …]
Dimx8mp-blk-ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
9 #include <linux/clk-provider.h>
19 #include <dt-bindings/power/imx8mp-power.h>
104 regmap_update_bits(clk->regmap, GPR_REG2, in clk_hsio_pll_prepare()
110 /* de-assert PLL reset */ in clk_hsio_pll_prepare()
111 regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST, PLL_RST); in clk_hsio_pll_prepare()
114 regmap_update_bits(clk->regmap, GPR_REG3, PLL_CKE, PLL_CKE); in clk_hsio_pll_prepare()
116 return regmap_read_poll_timeout(clk->regmap, GPR_REG1, val, in clk_hsio_pll_prepare()
124 regmap_update_bits(clk->regmap, GPR_REG3, PLL_RST | PLL_CKE, 0); in clk_hsio_pll_unprepare()
131 return regmap_test_bits(clk->regmap, GPR_REG1, PLL_LOCK); in clk_hsio_pll_is_prepared()
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Dimx93-blk-ctrl.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/power/fsl,imx93-power.h>
103 const struct imx93_blk_ctrl_domain_data *data = domain->data; in imx93_blk_ctrl_set_qos()
104 struct imx93_blk_ctrl *bc = domain->bc; in imx93_blk_ctrl_set_qos()
109 for (i = 0; i < data->num_qos; i++) { in imx93_blk_ctrl_set_qos()
110 qos = &data->qos[i]; in imx93_blk_ctrl_set_qos()
112 mask = PRIO_MASK << qos->cfg_off; in imx93_blk_ctrl_set_qos()
113 mask |= PRIO_MASK << (qos->cfg_off + 4); in imx93_blk_ctrl_set_qos()
114 val = qos->cfg_prio << qos->cfg_off; in imx93_blk_ctrl_set_qos()
115 val |= qos->default_prio << (qos->cfg_off + 4); in imx93_blk_ctrl_set_qos()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/media/
Dnxp,imx8-isi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
16 number and nature is SoC-dependent. They cover both capture interfaces (MIPI
17 CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
22 - fsl,imx8mn-isi
23 - fsl,imx8mp-isi
24 - fsl,imx93-isi
[all …]
Drockchip-isp1.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 ---
4 $id: http://devicetree.org/schemas/media/rockchip-isp1.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Helen Koike <helen.koike@collabora.com>
19 - fsl,imx8mp-isp
20 - rockchip,px30-cif-isp
21 - rockchip,rk3399-cif-isp
30 interrupt-names:
32 - const: isp
[all …]
/linux-6.12.1/drivers/pci/hotplug/
Dibmphp_ebda.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2001,2003 Greg Kroah-Hartman (greg@kroah.com)
8 * Copyright (C) 2001-2003 IBM Corp.
26 * POST builds data blocks(in this data block definition, a char-1
27 * byte, short(or word)-2 byte, long(dword)-4 byte) in the Extended
28 * BIOS Data Area which describe the configuration of the hot-plug
29 * controllers and resources used by the PCI Hot-Plug devices.
76 controller->slots = slots; in alloc_ebda_hpc()
81 controller->buses = buses; in alloc_ebda_hpc()
85 kfree(controller->slots); in alloc_ebda_hpc()
[all …]
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dimx8mp-audiomix.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx8mp-audiomix.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
18 const: fsl,imx8mp-audio-blk-ctrl
23 power-domains:
30 clock-names:
32 - const: ahb
33 - const: sai1
[all …]
Dnxp,imx95-blk-ctl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/nxp,imx95-blk-ctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peng Fan <peng.fan@nxp.com>
15 - enum:
16 - nxp,imx95-lvds-csr
17 - nxp,imx95-display-csr
18 - nxp,imx95-camera-csr
19 - nxp,imx95-netcmix-blk-ctrl
[all …]
/linux-6.12.1/include/acpi/
Dactbl.h1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
4 * Name: actbl.h - Basic ACPI Table Definitions
6 * Copyright (C) 2000 - 2023, Intel Corp.
18 * by ACPICA. All other tables are consumed by the OS-dependent ACPI-related
44 * All tables and structures must be byte-packed to match the ACPI
54 * essentially useless for dealing with packed data in on-disk formats or
82 * GAS - Generic Address Structure (ACPI 2.0+)
86 * 64-bit Address field must be performed with care.
95 u64 address; /* 64-bit address of struct or register */
100 * RSDP - Root System Description Pointer (Signature is "RSD PTR ")
[all …]
/linux-6.12.1/drivers/usb/gadget/function/
Df_midi2.c1 // SPDX-License-Identifier: GPL-2.0+
3 * f_midi2.c -- USB MIDI 2.0 class function driver
21 #include <linux/usb/midi-v2.h>
32 unsigned int index; /* array index: 0-31 */
85 struct f_midi2_usb_ep ep_in; /* USB MIDI EP-in */
86 struct f_midi2_usb_ep ep_out; /* USB MIDI EP-out */
88 u8 in_group_to_cable[SNDRV_UMP_MAX_GROUPS]; /* map to cable; 1-based! */
97 /* 1-based GTB id to string id */
98 #define gtb_to_str_id(id) (STR_GTB1 + (id) - 1)
128 /* conversion for MIDI 1.0 EP-in */
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/linux-6.12.1/drivers/gpu/drm/imx/dcss/
Ddcss-blkctl.c1 // SPDX-License-Identifier: GPL-2.0
10 #include "dcss-dev.h"
31 if (blkctl->dcss->hdmi_output) in dcss_blkctl_cfg()
32 dcss_writel(0, blkctl->base_reg + DCSS_BLKCTL_CONTROL0); in dcss_blkctl_cfg()
35 blkctl->base_reg + DCSS_BLKCTL_CONTROL0); in dcss_blkctl_cfg()
38 blkctl->base_reg + DCSS_BLKCTL_RESET_CTRL); in dcss_blkctl_cfg()
45 blkctl = devm_kzalloc(dcss->dev, sizeof(*blkctl), GFP_KERNEL); in dcss_blkctl_init()
47 return -ENOMEM; in dcss_blkctl_init()
49 blkctl->base_reg = devm_ioremap(dcss->dev, blkctl_base, SZ_4K); in dcss_blkctl_init()
50 if (!blkctl->base_reg) { in dcss_blkctl_init()
[all …]
/linux-6.12.1/arch/arm64/boot/dts/freescale/
Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
[all …]
/linux-6.12.1/drivers/nvme/host/
Dnvme.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2011-2014, Intel Corporation.
13 #include <linux/blk-mq.h>
14 #include <linux/sed-opal.h>
15 #include <linux/fault-inject.h>
18 #include <linux/t10-pi.h>
124 * Use non-standard 128 bytes SQEs.
173 * MSI (but not MSI-X) interrupts are broken and never fire.
180 * this structure as the first member of their request-private data.
192 struct nvme_ctrl *ctrl; member
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