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Searched full:bit_offset (Results 1 – 25 of 81) sorted by relevance

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/linux-6.12.1/drivers/gpio/
Dgpio-xgene.c41 u32 bit_offset; in xgene_gpio_get() local
44 bit_offset = GPIO_BIT_OFFSET(offset); in xgene_gpio_get()
45 return !!(ioread32(chip->base + bank_offset) & BIT(bit_offset)); in xgene_gpio_get()
52 u32 setval, bit_offset; in __xgene_gpio_set() local
55 bit_offset = GPIO_BIT_OFFSET(offset) + XGENE_GPIOS_PER_BANK; in __xgene_gpio_set()
59 setval |= BIT(bit_offset); in __xgene_gpio_set()
61 setval &= ~BIT(bit_offset); in __xgene_gpio_set()
78 unsigned long bank_offset, bit_offset; in xgene_gpio_get_direction() local
81 bit_offset = GPIO_BIT_OFFSET(offset); in xgene_gpio_get_direction()
83 if (ioread32(chip->base + bank_offset) & BIT(bit_offset)) in xgene_gpio_get_direction()
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/linux-6.12.1/drivers/soc/tegra/fuse/
Dfuse-tegra30.c141 .bit_offset = 0,
147 .bit_offset = 0,
153 .bit_offset = 0,
159 .bit_offset = 0,
165 .bit_offset = 0,
171 .bit_offset = 0,
177 .bit_offset = 0,
183 .bit_offset = 0,
189 .bit_offset = 0,
195 .bit_offset = 0,
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/linux-6.12.1/drivers/pinctrl/
Dpinctrl-bm1880.c1017 u32 *regval, u32 bit_offset) in bm1880_pinconf_drv_set() argument
1030 _regval &= ~(width << bit_offset); in bm1880_pinconf_drv_set()
1031 _regval |= (0 << bit_offset); in bm1880_pinconf_drv_set()
1034 _regval &= ~(width << bit_offset); in bm1880_pinconf_drv_set()
1035 _regval |= (1 << bit_offset); in bm1880_pinconf_drv_set()
1038 _regval &= ~(width << bit_offset); in bm1880_pinconf_drv_set()
1039 _regval |= (2 << bit_offset); in bm1880_pinconf_drv_set()
1042 _regval &= ~(width << bit_offset); in bm1880_pinconf_drv_set()
1043 _regval |= (3 << bit_offset); in bm1880_pinconf_drv_set()
1046 _regval &= ~(width << bit_offset); in bm1880_pinconf_drv_set()
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/linux-6.12.1/tools/bpf/bpftool/
Dbtf_dumper.c25 __u8 bit_offset, const void *data);
136 __u8 bit_offset, const void *data) in btf_dumper_modifier() argument
144 return btf_dumper_do_type(d, actual_type_id, bit_offset, data); in btf_dumper_modifier()
351 static void btf_dumper_bitfield(__u32 nr_bits, __u8 bit_offset, in btf_dumper_bitfield() argument
360 bits_to_copy = bit_offset + nr_bits; in btf_dumper_bitfield()
365 left_shift_bits = bit_offset; in btf_dumper_bitfield()
378 static void btf_dumper_int_bits(__u32 int_type, __u8 bit_offset, in btf_dumper_int_bits() argument
388 total_bits_offset = bit_offset + BTF_INT_OFFSET(int_type); in btf_dumper_int_bits()
390 bit_offset = BITS_PER_BYTE_MASKED(total_bits_offset); in btf_dumper_int_bits()
391 btf_dumper_bitfield(nr_bits, bit_offset, data, jw, in btf_dumper_int_bits()
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/linux-6.12.1/drivers/pinctrl/sprd/
Dpinctrl-sprd.h14 #define BIT_OFFSET (8) macro
20 ((offset) & 0xFF) << BIT_OFFSET | \
31 .bit_offset = (((a) >> BIT_OFFSET) & 0xff), \
48 unsigned long bit_offset; member
/linux-6.12.1/fs/bcachefs/
Dbkey.c797 unsigned i, byte, bit_offset, align, shl, shr; in compile_bkey_field() local
844 bit_offset = format->key_u64s * 64; in compile_bkey_field()
846 bit_offset -= format->bits_per_field[i]; in compile_bkey_field()
848 byte = bit_offset / 8; in compile_bkey_field()
849 bit_offset -= byte * 8; in compile_bkey_field()
853 if (bit_offset == 0 && bits == 8) { in compile_bkey_field()
856 } else if (bit_offset == 0 && bits == 16) { in compile_bkey_field()
859 } else if (bit_offset + bits <= 32) { in compile_bkey_field()
860 align = min(4 - DIV_ROUND_UP(bit_offset + bits, 8), byte & 3); in compile_bkey_field()
862 bit_offset += align * 8; in compile_bkey_field()
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/linux-6.12.1/drivers/gpu/drm/omapdrm/
Dtcm-sita.c87 unsigned long bit_offset = (offset > 0) ? offset / slot_bytes : 0; in l2r_t2b() local
88 unsigned long curr_bit = bit_offset; in l2r_t2b()
101 if (bit_offset > 0 && (*pos % slots_per_band != bit_offset)) { in l2r_t2b()
102 curr_bit = ALIGN(*pos, slots_per_band) + bit_offset; in l2r_t2b()
108 curr_bit = ALIGN(*pos, slot_stride) + bit_offset; in l2r_t2b()
139 if (bit_offset > 0) in l2r_t2b()
140 curr_bit = ALIGN(*pos, slots_per_band) + bit_offset; in l2r_t2b()
/linux-6.12.1/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
Dbit.c30 if (likely(bios->bit_offset)) { in bit_entry()
31 u8 entries = nvbios_rd08(bios, bios->bit_offset + 10); in bit_entry()
32 u32 entry = bios->bit_offset + 12; in bit_entry()
42 entry += nvbios_rd08(bios, bios->bit_offset + 9); in bit_entry()
/linux-6.12.1/drivers/acpi/acpica/
Dhwregs.c57 * 1. Detected if bit_offset is 0 and bit_width is 8/16/32/64; in acpi_hw_get_access_bit_width()
61 * 1. Detected if bit_offset is not 0 or bit_width is not 8/16/32/64; in acpi_hw_get_access_bit_width()
64 * 3. bit_offset/bit_width fields are used to describe the "region". in acpi_hw_get_access_bit_width()
69 if (!reg->bit_offset && reg->bit_width && in acpi_hw_get_access_bit_width()
77 ACPI_ROUND_UP_POWER_OF_TWO_8(reg->bit_offset + in acpi_hw_get_access_bit_width()
117 * pointer, Address, space_id, bit_width, and bit_offset.
167 ACPI_ROUND_UP(reg->bit_offset + reg->bit_width, access_width); in acpi_hw_validate_register()
200 u8 bit_offset; in acpi_hw_read() local
221 bit_width = reg->bit_offset + reg->bit_width; in acpi_hw_read()
222 bit_offset = reg->bit_offset; in acpi_hw_read()
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Ddsopcode.c83 u32 bit_offset; in acpi_ds_init_buffer_field() local
127 bit_offset = offset; in acpi_ds_init_buffer_field()
144 bit_offset = offset; in acpi_ds_init_buffer_field()
153 bit_offset = 8 * offset; in acpi_ds_init_buffer_field()
162 bit_offset = 8 * offset; in acpi_ds_init_buffer_field()
171 bit_offset = 8 * offset; in acpi_ds_init_buffer_field()
180 bit_offset = 8 * offset; in acpi_ds_init_buffer_field()
196 if ((bit_offset + bit_count) > (8 * (u32)buffer_desc->buffer.length)) { in acpi_ds_init_buffer_field()
202 bit_offset, bit_count, in acpi_ds_init_buffer_field()
214 bit_offset, bit_count); in acpi_ds_init_buffer_field()
/linux-6.12.1/arch/x86/kernel/acpi/
Dcppc.c52 u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1, in cpc_read_ffh()
53 reg->bit_offset); in cpc_read_ffh()
56 *val >>= reg->bit_offset; in cpc_read_ffh()
68 u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1, in cpc_write_ffh()
69 reg->bit_offset); in cpc_write_ffh()
71 val <<= reg->bit_offset; in cpc_write_ffh()
/linux-6.12.1/include/crypto/
Dsha1_base.h76 const int bit_offset = SHA1_BLOCK_SIZE - sizeof(__be64); in sha1_base_do_finalize() local
78 __be64 *bits = (__be64 *)(sctx->buffer + bit_offset); in sha1_base_do_finalize()
82 if (partial > bit_offset) { in sha1_base_do_finalize()
89 memset(sctx->buffer + partial, 0x0, bit_offset - partial); in sha1_base_do_finalize()
Dsm3_base.h79 const int bit_offset = SM3_BLOCK_SIZE - sizeof(__be64); in sm3_base_do_finalize() local
81 __be64 *bits = (__be64 *)(sctx->buffer + bit_offset); in sm3_base_do_finalize()
85 if (partial > bit_offset) { in sm3_base_do_finalize()
92 memset(sctx->buffer + partial, 0x0, bit_offset - partial); in sm3_base_do_finalize()
Dsha256_base.h87 const int bit_offset = SHA256_BLOCK_SIZE - sizeof(__be64); in lib_sha256_base_do_finalize() local
88 __be64 *bits = (__be64 *)(sctx->buf + bit_offset); in lib_sha256_base_do_finalize()
92 if (partial > bit_offset) { in lib_sha256_base_do_finalize()
99 memset(sctx->buf + partial, 0x0, bit_offset - partial); in lib_sha256_base_do_finalize()
Dsha512_base.h99 const int bit_offset = SHA512_BLOCK_SIZE - sizeof(__be64[2]); in sha512_base_do_finalize() local
101 __be64 *bits = (__be64 *)(sctx->buf + bit_offset); in sha512_base_do_finalize()
105 if (partial > bit_offset) { in sha512_base_do_finalize()
112 memset(sctx->buf + partial, 0x0, bit_offset - partial); in sha512_base_do_finalize()
/linux-6.12.1/drivers/acpi/apei/
Dapei-base.c64 *val >>= entry->register_region.bit_offset; in __apei_exec_read_register()
104 val <<= entry->register_region.bit_offset; in __apei_exec_write_register()
110 valr &= ~(entry->mask << entry->register_region.bit_offset); in __apei_exec_write_register()
571 u32 bit_width, bit_offset, access_size_code, space_id; in apei_check_gar() local
574 bit_offset = reg->bit_offset; in apei_check_gar()
581 *paddr, bit_width, bit_offset, access_size_code, in apei_check_gar()
589 *paddr, bit_width, bit_offset, access_size_code, in apei_check_gar()
596 if (bit_width == 32 && bit_offset == 0 && (*paddr & 0x03) == 0 && in apei_check_gar()
599 else if (bit_width == 64 && bit_offset == 0 && (*paddr & 0x07) == 0 && in apei_check_gar()
603 if ((bit_width + bit_offset) > *access_bit_width) { in apei_check_gar()
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/linux-6.12.1/drivers/net/wireless/ralink/rt2x00/
Drt2x00reg.h148 u8 bit_offset; member
153 u16 bit_offset; member
158 u32 bit_offset; member
240 ((__field).bit_offset)) & \
248 ((__field).bit_offset); \
/linux-6.12.1/sound/soc/codecs/
Dcs35l41-lib.c704 .bit_offset = 16,
711 .bit_offset = 16,
718 .bit_offset = 16,
725 .bit_offset = 16,
732 .bit_offset = 16,
819 int bit_offset, word_offset, ret, i; in cs35l41_otp_unpack() local
850 bit_offset = otp_map_match->bit_offset; in cs35l41_otp_unpack()
855 bit_offset, word_offset, bit_sum % 32, otp_map[i].size); in cs35l41_otp_unpack()
856 if (bit_offset + otp_map[i].size - 1 >= 32) { in cs35l41_otp_unpack()
858 GENMASK(31, bit_offset)) >> bit_offset; in cs35l41_otp_unpack()
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/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dst,stm32-rcc.txt45 It is calculated as: index = register_offset / 4 * 32 + bit_offset.
46 Where bit_offset is the bit offset within the register (LSB is 0, MSB is 31).
129 It is calculated as: index = register_offset / 4 * 32 + bit_offset.
130 Where bit_offset is the bit offset within the register.
/linux-6.12.1/drivers/nvmem/
Dcore.c32 int bit_offset; member
484 entry->bit_offset); in nvmem_populate_sysfs_cells()
580 cell->bit_offset = info->bit_offset; in nvmem_cell_info_to_nvmem_cell_entry_nodup()
585 cell->bytes = DIV_ROUND_UP(cell->nbits + cell->bit_offset, in nvmem_cell_info_to_nvmem_cell_entry_nodup()
825 info.bit_offset = be32_to_cpup(addr++); in nvmem_add_cells_from_dt()
827 if (info.bit_offset >= BITS_PER_BYTE || info.nbits < 1) { in nvmem_add_cells_from_dt()
1620 int i, extra, bit_offset = cell->bit_offset; in nvmem_shift_read_buffer_in_place() local
1623 if (bit_offset) { in nvmem_shift_read_buffer_in_place()
1625 *b++ >>= bit_offset; in nvmem_shift_read_buffer_in_place()
1630 *p |= *b << (BITS_PER_BYTE - bit_offset); in nvmem_shift_read_buffer_in_place()
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/linux-6.12.1/include/rdma/
Diba.h115 * Extraction using a tabular description like table 106. bit_offset is from
118 #define IBA_FIELD_BLOC(field_struct, byte_offset, bit_offset, num_bits) \ argument
120 GENMASK(7 - (bit_offset), 7 - (bit_offset) - (num_bits - 1)), \
/linux-6.12.1/tools/lib/bpf/
Drelo_core.c332 spec->bit_offset = access_idx * sz * 8; in bpf_core_parse_spec()
344 __u32 bit_offset; in bpf_core_parse_spec() local
349 bit_offset = btf_member_bit_offset(t, access_idx); in bpf_core_parse_spec()
350 spec->bit_offset += bit_offset; in bpf_core_parse_spec()
384 spec->bit_offset += access_idx * sz * 8; in bpf_core_parse_spec()
508 __u32 bit_offset; in bpf_core_match_member() local
510 bit_offset = btf_member_bit_offset(targ_type, i); in bpf_core_match_member()
517 spec->bit_offset += bit_offset; in bpf_core_match_member()
546 spec->bit_offset -= bit_offset; in bpf_core_match_member()
671 targ_spec->bit_offset += local_acc->idx * sz * 8; in bpf_core_spec_match()
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/linux-6.12.1/drivers/irqchip/
Dirq-meson-gpio.c208 unsigned int bit_offset; in meson8_gpio_irq_sel_pin() local
211 bit_offset = REG_PIN_SEL_SHIFT(channel); in meson8_gpio_irq_sel_pin()
214 ctl->params->pin_sel_mask << bit_offset, in meson8_gpio_irq_sel_pin()
215 hwirq << bit_offset); in meson8_gpio_irq_sel_pin()
223 unsigned int bit_offset; in meson_a1_gpio_irq_sel_pin() local
225 bit_offset = ((channel % 2) == 0) ? 0 : 16; in meson_a1_gpio_irq_sel_pin()
229 ctl->params->pin_sel_mask << bit_offset, in meson_a1_gpio_irq_sel_pin()
230 hwirq << bit_offset); in meson_a1_gpio_irq_sel_pin()
/linux-6.12.1/drivers/acpi/
Dacpi_lpit.c44 u64 mask = GENMASK_ULL(residency_info_ffh.gaddr.bit_offset + in lpit_read_residency_counter_us()
46 residency_info_ffh.gaddr.bit_offset); in lpit_read_residency_counter_us()
49 *counter >>= residency_info_ffh.gaddr.bit_offset; in lpit_read_residency_counter_us()
Dprocessor_throttling.c460 throttling->control_register.bit_offset) > 32) { in acpi_processor_get_throttling_control()
467 throttling->status_register.bit_offset) > 32) { in acpi_processor_get_throttling_control()
752 u32 bit_width, bit_offset; in acpi_read_throttling_status() local
762 bit_offset = throttling->status_register.bit_offset; in acpi_read_throttling_status()
766 (u32) (bit_width + bit_offset)); in acpi_read_throttling_status()
768 *value = (u64) ((ptc_value >> bit_offset) & ptc_mask); in acpi_read_throttling_status()
784 u32 bit_width, bit_offset; in acpi_write_throttling_state() local
794 bit_offset = throttling->control_register.bit_offset; in acpi_write_throttling_state()
800 (u32) (ptc_value << bit_offset), in acpi_write_throttling_state()
801 (u32) (bit_width + bit_offset)); in acpi_write_throttling_state()

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