Searched full:architected (Results 1 – 25 of 76) sorted by relevance
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| /linux-6.12.1/arch/powerpc/kernel/ |
| D | cpu_specs_book3s_64.h | 203 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
206 .cpu_name = "POWER6 (architected)",
214 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
217 .cpu_name = "POWER7 (architected)",
229 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
232 .cpu_name = "POWER8 (architected)",
259 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */
262 .cpu_name = "POWER9 (architected)",
273 { /* 3.1-compliant processor, i.e. Power10 "architected" mode */
276 .cpu_name = "POWER10 (architected)",
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| /linux-6.12.1/Documentation/devicetree/bindings/timer/ |
| D | arm,arch_timer.yaml | 7 title: ARM architected timer
13 ARM cores may have a per-core architected timer, which provides per-cpu timers,
14 or a memory mapped architected timer, which provides up to 8 frames with a
17 The per-core architected timer is attached to a GIC to deliver its
95 supported for 32-bit systems which follow the ARMv7 architected reset
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| D | arm,arch_timer_mmio.yaml | 7 title: ARM memory mapped architected timer
14 ARM cores may have a memory mapped architected timer, which provides up to 8
52 supported for 32-bit systems which follow the ARMv7 architected reset
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| /linux-6.12.1/arch/arm/mach-bcm/ |
| D | Kconfig | 10 comment "IPROC architected SoCs"
24 This enables support for systems based on Broadcom IPROC architected SoCs.
87 comment "KONA architected SoCs"
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| /linux-6.12.1/Documentation/arch/arm64/ |
| D | amu.rst | 39 The Activity Monitors architecture provides space for up to 16 architected
41 implement additional architected event counters.
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| D | booting.rst | 185 System caches which respect the architected cache maintenance by VA
187 System caches which do not respect architected cache maintenance by VA
190 - Architected timers
206 All writable architected system registers at or below the exception
414 The requirements described above for CPU mode, caches, MMUs, architected
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| D | elf_hwcaps.rst | 15 architected discovery mechanism available to userspace code at EL0. The
46 which are described by architected ID registers inaccessible to
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| /linux-6.12.1/arch/arm/kernel/ |
| D | arch_timer.c | 26 /* Use the architected timer for the delay loop. */ in arch_timer_delay_timer_register()
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| /linux-6.12.1/arch/alpha/include/asm/ |
| D | hwrpb.h | 9 * These values are architected.
31 * These values are architected.
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| /linux-6.12.1/drivers/parisc/ |
| D | gsc.h | 18 /* PA I/O Architected devices support at least 5 bits in the EIM register. */
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| /linux-6.12.1/tools/perf/pmu-events/arch/x86/broadwellde/ |
| D | cache.json | 539 …licDescription": "This event counts load uops with locked access retired to the architected path.",
550 …"PublicDescription": "This event counts line-splitted load uops retired to the architected path. A…
561 …"PublicDescription": "This event counts line-splitted store uops retired to the architected path. …
572 …tion": "This event counts load uops with true STLB miss retired to the architected path. True STLB…
583 …ion": "This event counts store uops with true STLB miss retired to the architected path. True STLB…
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| /linux-6.12.1/arch/arm/mach-rockchip/ |
| D | rockchip.c | 29 * which is needed for the architected timer to work. in rockchip_timer_init()
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| /linux-6.12.1/Documentation/devicetree/bindings/perf/ |
| D | arm,smmu-v3-pmcg.yaml | 16 architected and IMPLEMENTATION DEFINED event counters.
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| /linux-6.12.1/arch/arm64/kernel/ |
| D | time.c | 66 panic("Unable to initialise architected timer.\n"); in time_init()
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| /linux-6.12.1/Documentation/virt/kvm/arm/ |
| D | vcpu-features.rst | 18 Otherwise, all CPU features supported by KVM are described by the architected
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| /linux-6.12.1/tools/perf/pmu-events/arch/x86/broadwellx/ |
| D | cache.json | 539 …licDescription": "This event counts load uops with locked access retired to the architected path.",
550 …"PublicDescription": "This event counts line-splitted load uops retired to the architected path. A…
561 …"PublicDescription": "This event counts line-splitted store uops retired to the architected path. …
572 …tion": "This event counts load uops with true STLB miss retired to the architected path. True STLB…
583 …ion": "This event counts store uops with true STLB miss retired to the architected path. True STLB…
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| /linux-6.12.1/arch/powerpc/include/asm/ |
| D | cputhreads.h | 70 * architected, is not something a hypervisor could emulate and a future
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| D | lppaca.h | 108 * We are using a non architected field to determine if a partition is
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| /linux-6.12.1/Documentation/admin-guide/perf/ |
| D | xgene-pmu.rst | 7 controller(s). These PMU devices are loosely architected to follow the
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| /linux-6.12.1/arch/powerpc/include/asm/nohash/ |
| D | pte-e500.h | 12 /* Architected bits */
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| /linux-6.12.1/arch/alpha/include/uapi/asm/ |
| D | fpu.h | 38 * floating-point enable bit (which is architected). On top of that,
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| /linux-6.12.1/include/scsi/ |
| D | viosrp.h | 16 /* between partitions. The definitions in this file are architected, */
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| /linux-6.12.1/drivers/clocksource/ |
| D | Kconfig | 319 bool "Enable ARM architected timer event stream generation by default"
324 based on the ARM architected timer. It is used for waking up CPUs
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| /linux-6.12.1/Documentation/arch/powerpc/ |
| D | elf_hwcaps.rst | 167 The processor supports architected PMU events in the range 0xE0-0xFF.
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| /linux-6.12.1/Documentation/devicetree/bindings/powerpc/ |
| D | ibm,powerpc-cpu-features.txt | 71 Node: A string describing an architected CPU feature, e.g., "floating-point".
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