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/linux-6.12.1/drivers/net/ethernet/ti/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
83 tristate "TI Common Platform Time Sync (CPTS) Support"
107 The two-port Gigabit Ethernet MAC (MCU_CPSW0) subsystem provides
113 will be called ti-am65-cpsw-nuss.
121 Switch. Enable this driver to support hardware switch support for AM65
125 tristate "TI K3 AM65x CPTS"
129 Say y here to support the TI K3 AM65x CPTS with 1588 features such as
130 PTP hardware clock for each CPTS device and network packets
132 Depending on integration CPTS blocks enable compliance with
133 the IEEE 1588-2008 standard for a precision clock synchronization
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 obj-$(CONFIG_TI_CPSW) += cpsw-common.o
7 obj-$(CONFIG_TI_DAVINCI_EMAC) += cpsw-common.o
8 obj-$(CONFIG_TI_CPSW_SWITCHDEV) += cpsw-common.o
10 obj-$(CONFIG_TLAN) += tlan.o
11 obj-$(CONFIG_TI_DAVINCI_EMAC) += ti_davinci_emac.o
12 ti_davinci_emac-y := davinci_emac.o davinci_cpdma.o
13 obj-$(CONFIG_TI_DAVINCI_MDIO) += davinci_mdio.o
14 obj-$(CONFIG_TI_CPSW_PHY_SEL) += cpsw-phy-sel.o
15 obj-$(CONFIG_TI_CPTS) += cpts.o
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Dam65-cpts.h1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* TI K3 AM65 CPTS driver interface
4 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
21 void am65_cpts_release(struct am65_cpts *cpts);
24 int am65_cpts_phc_index(struct am65_cpts *cpts);
25 void am65_cpts_rx_timestamp(struct am65_cpts *cpts, struct sk_buff *skb);
26 void am65_cpts_tx_timestamp(struct am65_cpts *cpts, struct sk_buff *skb);
27 void am65_cpts_prep_tx_timestamp(struct am65_cpts *cpts, struct sk_buff *skb);
28 u64 am65_cpts_ns_gettime(struct am65_cpts *cpts);
29 int am65_cpts_estf_enable(struct am65_cpts *cpts, int idx,
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Dam65-cpts.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com
9 #include <linux/clk-provider.h>
23 #include "am65-cpts.h"
201 #define am65_cpts_write32(c, v, r) writel(v, &(c)->reg->r)
202 #define am65_cpts_read32(c, r) readl(&(c)->reg->r)
204 static void am65_cpts_settime(struct am65_cpts *cpts, u64 start_tstamp) in am65_cpts_settime() argument
209 am65_cpts_write32(cpts, val, ts_load_val_hi); in am65_cpts_settime()
211 am65_cpts_write32(cpts, val, ts_load_val_lo); in am65_cpts_settime()
213 am65_cpts_write32(cpts, AM65_CPTS_TS_LOAD_EN, ts_load_en); in am65_cpts_settime()
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Dam65-cpsw-qos.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Texas Instruments K3 AM65 Ethernet QoS submodule
3 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
6 * Enhanced Scheduler Traffic (EST - P802.1Qbv/D2.2)
7 * Interspersed Express Traffic (IET - P802.3br/D2.0)
17 #include "am65-cpsw-nuss.h"
18 #include "am65-cpsw-qos.h"
19 #include "am65-cpts.h"
47 writel(0, port->port_base + AM65_CPSW_PN_REG_PRI_CIR(prio)); in am65_cpsw_tx_pn_shaper_reset()
48 writel(0, port->port_base + AM65_CPSW_PN_REG_PRI_EIR(prio)); in am65_cpsw_tx_pn_shaper_reset()
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Dam65-cpsw-nuss.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
15 #include <linux/soc/ti/k3-ringacc.h>
18 #include "am65-cpsw-qos.h"
84 spinlock_t lock; /* protect TX rings in multi-port mode */
172 struct am65_cpts *cpts; member
208 #define am65_ndev_to_port(ndev) (am65_ndev_to_priv(ndev)->port)
209 #define am65_ndev_to_common(ndev) (am65_ndev_to_port(ndev)->common)
210 #define am65_ndev_to_slave(ndev) (&am65_ndev_to_port(ndev)->slave)
212 #define am65_common_get_host(common) (&(common)->host)
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Dam65-cpsw-nuss.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Texas Instruments K3 AM65 Ethernet Switch SubSystem Driver
4 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
32 #include <linux/dma/ti-cppi5.h>
33 #include <linux/dma/k3-udma-glue.h>
39 #include "am65-cpsw-nuss.h"
40 #include "am65-cpsw-switchdev.h"
41 #include "k3-cppi-desc-pool.h"
42 #include "am65-cpts.h"
125 /* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */
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Dam65-cpsw-ethtool.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Texas Instruments K3 AM65 Ethernet Switch SubSystem Driver ethtool ops
4 * Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
13 #include "am65-cpsw-nuss.h"
14 #include "am65-cpsw-qos.h"
16 #include "am65-cpts.h"
34 * struct am65_cpsw_regdump_hdr - regdump record header
46 * struct am65_cpsw_regdump_item - regdump module description
65 .hdr.len = (end + 4 - start) * 2 + \
376 "p0-rx-ptype-rrobin",
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/linux-6.12.1/Documentation/devicetree/bindings/net/
Dti,k3-am654-cpts.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,k3-am654-cpts.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: The TI AM654x/J721E Common Platform Time Sync (CPTS) module
10 - Siddharth Vadapalli <s-vadapalli@ti.com>
11 - Roger Quadros <rogerq@kernel.org>
14 The TI AM654x/J721E CPTS module is used to facilitate host control of time
16 Main features of CPTS module are
17 - selection of multiple external clock sources
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Dti,k3-am654-cpsw-nuss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,k3-am654-cpsw-nuss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Siddharth Vadapalli <s-vadapalli@ti.com>
11 - Roger Quadros <rogerq@kernel.org>
22 Complex (UDMA-P) controller.
40 new version of Common Platform Time Sync (CPTS)
52 "#address-cells": true
53 "#size-cells": true
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/linux-6.12.1/arch/arm64/boot/dts/ti/
Dk3-am65-mcu.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "simple-bus";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 cpsw_mac_syscon: ethernet-mac-syscon@200 {
16 compatible = "ti,am62p-cpsw-mac-efuse", "syscon";
21 compatible = "ti,am654-phy-gmii-sel";
23 #phy-cells = <1>;
29 compatible = "pinctrl-single";
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Dk3-j7200-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
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Dk3-j721e-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
9 dmsc: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
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Dk3-j784s4-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
9 sms: system-controller@44083000 {
10 bootph-all;
11 compatible = "ti,k2g-sci";
12 ti,host-id = <12>;
14 mbox-names = "rx", "tx";
19 reg-names = "debug_messages";
22 k3_pds: power-controller {
23 bootph-all;
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Dk3-j721s2-mcu-wakeup.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
9 sms: system-controller@44083000 {
10 compatible = "ti,k2g-sci";
11 ti,host-id = <12>;
13 mbox-names = "rx", "tx";
18 reg-names = "debug_messages";
21 k3_pds: power-controller {
22 compatible = "ti,sci-pm-domain";
23 #power-domain-cells = <2>;
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Dk3-j784s4-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/mux/mux.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/phy/phy-ti.h>
12 #include "k3-serdes.h"
15 serdes_refclk: clock-serdes {
16 #clock-cells = <0>;
17 compatible = "fixed-clock";
25 compatible = "mmio-sram";
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Dk3-j721s2-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-ti.h>
12 serdes_refclk: clock-cmnrefclk {
13 #clock-cells = <0>;
14 compatible = "fixed-clock";
15 clock-frequency = <0>;
21 compatible = "mmio-sram";
23 #address-cells = <1>;
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Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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