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/linux-6.12.1/Documentation/devicetree/bindings/dma/
Darm-pl08x.yaml59 lli-bus-interface-ahb2:
67 mem-bus-interface-ahb2:
115 lli-bus-interface-ahb2;
116 mem-bus-interface-ahb2;
135 lli-bus-interface-ahb2;
136 mem-bus-interface-ahb2;
Dlpc1850-dmamux.txt30 lli-bus-interface-ahb2;
32 mem-bus-interface-ahb2;
/linux-6.12.1/Documentation/devicetree/bindings/clock/
Dallwinner,sun4i-a10-ahb-clk.yaml23 - allwinner,sun8i-h3-ahb2-clk
73 const: allwinner,sun8i-h3-ahb2-clk
102 compatible = "allwinner,sun8i-h3-ahb2-clk";
105 clock-output-names = "ahb2";
Dallwinner,sun8i-h3-bus-gates-clk.yaml61 clocks = <&ahb1>, <&ahb2>, <&apb1>, <&apb2>;
62 clock-names = "ahb1", "ahb2", "apb1", "apb2";
Dst,stm32-rcc.txt62 /* Gated clock, AHB2 bit 4 (CRYP) */
Dallwinner,sun4i-a10-gates-clk.yaml34 - const: allwinner,sun9i-a80-ahb2-gates-clk
/linux-6.12.1/drivers/clk/sunxi/
Dclk-sun8i-bus-gates.c22 static const char * const names[] = { "ahb1", "ahb2", "apb1", "apb2" }; in sun8i_h3_bus_gates_init()
23 enum { AHB1, AHB2, APB1, APB2, PARENT_MAX } clk_parent; in sun8i_h3_bus_gates_init() enumerator
64 clk_parent = AHB2; in sun8i_h3_bus_gates_init()
Dclk-simple-gates.c131 CLK_OF_DECLARE(sun9i_a80_ahb2, "allwinner,sun9i-a80-ahb2-gates-clk",
/linux-6.12.1/drivers/clk/sunxi-ng/
Dccu-sun50i-h6.c237 static SUNXI_CCU_MP_WITH_MUX(psi_ahb1_ahb2_clk, "psi-ahb1-ahb2",
246 "psi-ahb1-ahb2",
281 static SUNXI_CCU_GATE(bus_de_clk, "bus-de", "psi-ahb1-ahb2",
294 static SUNXI_CCU_GATE(bus_deinterlace_clk, "bus-deinterlace", "psi-ahb1-ahb2",
304 static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "psi-ahb1-ahb2",
316 static SUNXI_CCU_GATE(bus_ce_clk, "bus-ce", "psi-ahb1-ahb2",
326 static SUNXI_CCU_GATE(bus_ve_clk, "bus-ve", "psi-ahb1-ahb2",
336 static SUNXI_CCU_GATE(bus_emce_clk, "bus-emce", "psi-ahb1-ahb2",
346 static SUNXI_CCU_GATE(bus_vp9_clk, "bus-vp9", "psi-ahb1-ahb2",
349 static SUNXI_CCU_GATE(bus_dma_clk, "bus-dma", "psi-ahb1-ahb2",
[all …]
Dccu-sun50i-a100.c275 static SUNXI_CCU_MP_WITH_MUX(psi_ahb1_ahb2_clk, "psi-ahb1-ahb2",
283 "psi-ahb1-ahb2",
320 static SUNXI_CCU_GATE(bus_de_clk, "bus-de", "psi-ahb1-ahb2",
334 static SUNXI_CCU_GATE(bus_g2d_clk, "bus-g2d", "psi-ahb1-ahb2",
344 static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "psi-ahb1-ahb2",
355 static SUNXI_CCU_GATE(bus_ce_clk, "bus-ce", "psi-ahb1-ahb2",
365 static SUNXI_CCU_GATE(bus_ve_clk, "bus-ve", "psi-ahb1-ahb2",
368 static SUNXI_CCU_GATE(bus_dma_clk, "bus-dma", "psi-ahb1-ahb2",
371 static SUNXI_CCU_GATE(bus_msgbox_clk, "bus-msgbox", "psi-ahb1-ahb2",
374 static SUNXI_CCU_GATE(bus_spinlock_clk, "bus-spinlock", "psi-ahb1-ahb2",
[all …]
Dccu-sun50i-h616.c248 static SUNXI_CCU_MP_WITH_MUX(psi_ahb1_ahb2_clk, "psi-ahb1-ahb2",
257 "psi-ahb1-ahb2",
292 static SUNXI_CCU_GATE(bus_de_clk, "bus-de", "psi-ahb1-ahb2",
303 static SUNXI_CCU_GATE(bus_deinterlace_clk, "bus-deinterlace", "psi-ahb1-ahb2",
312 static SUNXI_CCU_GATE(bus_g2d_clk, "bus-g2d", "psi-ahb1-ahb2",
326 static SUNXI_CCU_GATE(bus_gpu_clk, "bus-gpu", "psi-ahb1-ahb2",
337 static SUNXI_CCU_GATE(bus_ce_clk, "bus-ce", "psi-ahb1-ahb2",
347 static SUNXI_CCU_GATE(bus_ve_clk, "bus-ve", "psi-ahb1-ahb2",
350 static SUNXI_CCU_GATE(bus_dma_clk, "bus-dma", "psi-ahb1-ahb2",
353 static SUNXI_CCU_GATE(bus_hstimer_clk, "bus-hstimer", "psi-ahb1-ahb2",
[all …]
Dccu-sun9i-a80.c294 .hw.init = CLK_HW_INIT_PARENTS("ahb2",
760 /* AHB2 bus gates */
761 static SUNXI_CCU_GATE(bus_lcd0_clk, "bus-lcd0", "ahb2",
763 static SUNXI_CCU_GATE(bus_lcd1_clk, "bus-lcd1", "ahb2",
765 static SUNXI_CCU_GATE(bus_edp_clk, "bus-edp", "ahb2",
767 static SUNXI_CCU_GATE(bus_csi_clk, "bus-csi", "ahb2",
769 static SUNXI_CCU_GATE(bus_hdmi_clk, "bus-hdmi", "ahb2",
771 static SUNXI_CCU_GATE(bus_de_clk, "bus-de", "ahb2",
773 static SUNXI_CCU_GATE(bus_mp_clk, "bus-mp", "ahb2",
775 static SUNXI_CCU_GATE(bus_mipi_dsi_clk, "bus-mipi-dsi", "ahb2",
[all …]
Dccu-sun8i-h3.c210 .hw.init = CLK_HW_INIT_PARENTS("ahb2",
231 static SUNXI_CCU_GATE(bus_emac_clk, "bus-emac", "ahb2",
245 static SUNXI_CCU_GATE(bus_ehci1_clk, "bus-ehci1", "ahb2",
247 static SUNXI_CCU_GATE(bus_ehci2_clk, "bus-ehci2", "ahb2",
249 static SUNXI_CCU_GATE(bus_ehci3_clk, "bus-ehci3", "ahb2",
253 static SUNXI_CCU_GATE(bus_ohci1_clk, "bus-ohci1", "ahb2",
255 static SUNXI_CCU_GATE(bus_ohci2_clk, "bus-ohci2", "ahb2",
257 static SUNXI_CCU_GATE(bus_ohci3_clk, "bus-ohci3", "ahb2",
Dccu-sun8i-a83t.c288 .hw.init = CLK_HW_INIT_PARENTS("ahb2",
311 static SUNXI_CCU_GATE(bus_emac_clk, "bus-emac", "ahb2",
321 static SUNXI_CCU_GATE(bus_ehci0_clk, "bus-ehci0", "ahb2",
323 static SUNXI_CCU_GATE(bus_ehci1_clk, "bus-ehci1", "ahb2",
325 static SUNXI_CCU_GATE(bus_ohci0_clk, "bus-ohci0", "ahb2",
Dccu-sun50i-a64.c291 .hw.init = CLK_HW_INIT_PARENTS("ahb2",
314 static SUNXI_CCU_GATE(bus_emac_clk, "bus-emac", "ahb2",
328 static SUNXI_CCU_GATE(bus_ehci1_clk, "bus-ehci1", "ahb2",
332 static SUNXI_CCU_GATE(bus_ohci1_clk, "bus-ohci1", "ahb2",
Dccu-sun8i-v3s.c206 .hw.init = CLK_HW_INIT_PARENTS("ahb2",
225 static SUNXI_CCU_GATE(bus_emac_clk, "bus-emac", "ahb2",
/linux-6.12.1/include/dt-bindings/mfd/
Dstm32f4-rcc.h37 /* AHB2 */
Dstm32f7-rcc.h38 /* AHB2 */
Dstm32h7-rcc.h30 /* AHB2 */
/linux-6.12.1/arch/arm/boot/dts/st/
Dste-nomadik-stn8815.dtsi863 lli-bus-interface-ahb2;
864 mem-bus-interface-ahb2;
877 lli-bus-interface-ahb2;
878 mem-bus-interface-ahb2;
/linux-6.12.1/arch/arm/boot/dts/gemini/
Dgemini.dtsi421 lli-bus-interface-ahb2;
422 mem-bus-interface-ahb2;
/linux-6.12.1/arch/arm/boot/dts/nxp/lpc/
Dlpc18xx.dtsi96 lli-bus-interface-ahb2;
98 mem-bus-interface-ahb2;
/linux-6.12.1/drivers/clk/ingenic/
Dx1830-cgu.c259 "ahb2", CGU_CLK_DIV,
Dx1000-cgu.c322 "ahb2", CGU_CLK_DIV,
Djz4780-cgu.c380 "ahb2", CGU_CLK_DIV,

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