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/linux-6.12.1/drivers/iio/adc/
Dimx93_adc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * NXP i.MX93 ADC driver
22 #define IMX93_ADC_DRIVER_NAME "imx93-adc"
42 /* ADC bit shift */
61 /* ADC status */
72 struct device *dev; member
102 static void imx93_adc_power_down(struct imx93_adc *adc) in imx93_adc_power_down() argument
107 mcr = readl(adc->regs + IMX93_ADC_MCR); in imx93_adc_power_down()
109 writel(mcr, adc->regs + IMX93_ADC_MCR); in imx93_adc_power_down()
111 ret = readl_poll_timeout(adc->regs + IMX93_ADC_MSR, msr, in imx93_adc_power_down()
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Dimx8qxp-adc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * NXP i.MX8QXP ADC driver
30 #define ADC_DRIVER_NAME "imx8qxp-adc"
46 /* ADC bit shift */
75 /* ADC PARAMETER*/
92 struct device *dev; member
97 /* Serialise ADC channel reads */
123 static void imx8qxp_adc_reset(struct imx8qxp_adc *adc) in imx8qxp_adc_reset() argument
128 ctrl = readl(adc->regs + IMX8QXP_ADR_ADC_CTRL); in imx8qxp_adc_reset()
130 writel(ctrl, adc->regs + IMX8QXP_ADR_ADC_CTRL); in imx8qxp_adc_reset()
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Drzg2l_adc.c1 // SPDX-License-Identifier: GPL-2.0
7 * Author: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
24 #define DRIVER_NAME "rzg2l-adc"
93 static unsigned int rzg2l_adc_readl(struct rzg2l_adc *adc, u32 reg) in rzg2l_adc_readl() argument
95 return readl(adc->base + reg); in rzg2l_adc_readl()
98 static void rzg2l_adc_writel(struct rzg2l_adc *adc, unsigned int reg, u32 val) in rzg2l_adc_writel() argument
100 writel(val, adc->base + reg); in rzg2l_adc_writel()
103 static void rzg2l_adc_pwr(struct rzg2l_adc *adc, bool on) in rzg2l_adc_pwr() argument
107 reg = rzg2l_adc_readl(adc, RZG2L_ADM(0)); in rzg2l_adc_pwr()
112 rzg2l_adc_writel(adc, RZG2L_ADM(0), reg); in rzg2l_adc_pwr()
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Dstm32-adc.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file is part of STM32 ADC driver
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
12 #include <linux/dma-mapping.h>
16 #include <linux/iio/timer/stm32-lptim-trigger.h>
17 #include <linux/iio/timer/stm32-timer-trigger.h>
26 #include <linux/nvmem-consumer.h>
31 #include "stm32-adc-core.h"
36 /* BOOST bit must be set on STM32H7 when ADC clock is above 20MHz */
58 /* extsel - trigger mux selection value */
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Dpalmas_gpadc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * palmas-adc.c -- TI PALMAS GPADC.
26 #define MOD_NAME "palmas-gpadc"
29 #define PALMAS_GPADC_TRIMINVALID -1
90 * struct palmas_gpadc - the palmas_gpadc structure
110 * This is the palmas_gpadc structure to store run-time information
114 struct device *dev; member
131 static struct palmas_adc_event *palmas_gpadc_get_event(struct palmas_gpadc *adc, in palmas_gpadc_get_event() argument
135 if (adc_chan == adc->event0.channel && dir == adc->event0.direction) in palmas_gpadc_get_event()
136 return &adc->event0; in palmas_gpadc_get_event()
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Dad7944.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Analog Devices AD7944/85/86 PulSAR ADC family driver.
37 /* datasheet calls this "4-wire mode" */
39 /* datasheet calls this "3-wire mode" (not related to SPI_3WIRE!) */
45 /* maps adi,spi-mode property value to enum */
58 /* Chip-specific timing specifications. */
64 /* Indicates TURBO is hard-wired to be always enabled. */
102 * AD7944_DEFINE_CHIP_INFO - Define a chip info structure for a specific chip
131 /* pseudo-differential with ground sense */
137 static int ad7944_3wire_cs_mode_init_msg(struct device *dev, struct ad7944_adc *adc, in ad7944_3wire_cs_mode_init_msg() argument
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Dmax1241.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * MAX1241 low-power, 12-bit serial ADC
5 * Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX1240-MAX1241.pdf
41 static int max1241_read(struct max1241 *adc) in max1241_read() argument
57 .rx_buf = &adc->data, in max1241_read()
62 return spi_sync_transfer(adc->spi, xfers, ARRAY_SIZE(xfers)); in max1241_read()
70 struct max1241 *adc = iio_priv(indio_dev); in max1241_read_raw() local
74 mutex_lock(&adc->lock); in max1241_read_raw()
76 if (adc->shutdown) { in max1241_read_raw()
77 gpiod_set_value(adc->shutdown, 0); in max1241_read_raw()
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Dstm32-dfsdm-adc.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file is the ADC part of the STM32 DFSDM driver
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
10 #include <linux/dma-mapping.h>
11 #include <linux/iio/adc/stm32-dfsdm-adc.h>
14 #include <linux/iio/hw-consumer.h>
16 #include <linux/iio/timer/stm32-lptim-trigger.h>
17 #include <linux/iio/timer/stm32-timer-trigger.h>
29 #include "stm32-dfsdm.h"
44 /* Limit filter output resolution to 31 bits. (i.e. sample range is +/-2^30) */
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Dlpc18xx_adc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * IIO ADC driver for NXP LPC18xx ADC
8 * - Hardware triggers
9 * - Burst mode
10 * - Interrupts
11 * - DMA
26 /* LPC18XX ADC registers and bits */
44 struct device *dev; member
69 static int lpc18xx_adc_read_chan(struct lpc18xx_adc *adc, unsigned int ch) in lpc18xx_adc_read_chan() argument
74 reg = adc->cr_reg | BIT(ch) | LPC18XX_ADC_CR_START_NOW; in lpc18xx_adc_read_chan()
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Dmcp3911.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for Microchip MCP3911, Two-channel Analog Front End
106 int (*config)(struct mcp3911 *adc, bool external_vref);
107 int (*get_osr)(struct mcp3911 *adc, u32 *val);
108 int (*set_osr)(struct mcp3911 *adc, u32 val);
109 int (*enable_offset)(struct mcp3911 *adc, bool enable);
110 int (*get_offset)(struct mcp3911 *adc, int channel, int *val);
111 int (*set_offset)(struct mcp3911 *adc, int channel, int val);
112 int (*set_scale)(struct mcp3911 *adc, int channel, u32 val);
132 static int mcp3911_read(struct mcp3911 *adc, u8 reg, u32 *val, u8 len) in mcp3911_read() argument
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Dqcom-spmi-adc5.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/iio/adc/qcom-vadc-common.h>
23 #include <dt-bindings/iio/qcom,spmi-vadc.h>
104 * struct adc5_channel_prop - ADC channel property.
113 * @avg_samples: ability to provide single result from the ADC
133 * struct adc5_chip - ADC private structure.
135 * @dev: SPMI ADC5 device.
136 * @base: base address for the ADC peripheral.
137 * @nchannels: number of ADC channels.
138 * @chan_props: array of ADC channel properties.
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Dingenic-adc.c1 // SPDX-License-Identifier: GPL-2.0
3 * ADC driver for the Ingenic JZ47xx SoCs
4 * Copyright (c) 2019 Artur Rojek <contact@artur-rojek.eu>
6 * based on drivers/mfd/jz4740-adc.c
9 #include <dt-bindings/iio/adc/ingenic,adc.h>
102 int (*init_clk_div)(struct device *dev, struct ingenic_adc *adc);
116 struct ingenic_adc *adc = iio_priv(iio_dev); in ingenic_adc_set_adcmd() local
118 mutex_lock(&adc->lock); in ingenic_adc_set_adcmd()
121 readl(adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
128 adc->base + JZ_ADC_REG_ADCMD); in ingenic_adc_set_adcmd()
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Drn5t618-adc.c1 // SPDX-License-Identifier: GPL-2.0+
3 * ADC driver for the RICOH RN5T618 power management chip family
28 /* average 4-time conversion mode */
39 struct device *dev; member
72 ret = regmap_bulk_read(rn5t618->regmap, reg, data, sizeof(data)); in rn5t618_read_adc_reg()
83 struct rn5t618_adc_data *adc = data; in rn5t618_adc_irq() local
88 regmap_write(adc->rn5t618->regmap, RN5T618_IR_ADC1, 0); in rn5t618_adc_irq()
89 regmap_write(adc->rn5t618->regmap, RN5T618_IR_ADC2, 0); in rn5t618_adc_irq()
91 ret = regmap_read(adc->rn5t618->regmap, RN5T618_IR_ADC3, &r); in rn5t618_adc_irq()
93 dev_err(adc->dev, "failed to read IRQ status: %d\n", ret); in rn5t618_adc_irq()
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Dmcp3564.c1 // SPDX-License-Identifier: GPL-2.0+
3 * IIO driver for MCP356X/MCP356XR and MCP346X/MCP346XR series ADC chip family
5 * Copyright (C) 2022-2023 Microchip Technology Inc. and its subsidiaries
10 …s/aemDocuments/documents/MSLD/ProductDocuments/DataSheets/MCP3561-2-4-Family-Data-Sheet-DS20006181…
12 …ds/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3561_2_4R-Data-Sheet-DS200006391C.pdf
14 …ProductDocuments/DataSheets/MCP3461-2-4-Two-Four-Eight-Channel-153.6-ksps-Low-Noise-16-Bit-Delta-S…
16 …/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP3461-2-4R-Family-Data-Sheet-DS20006404…
64 * ADC Output Data Format 32-bit (25-bit right justified data + Channel ID):
65 * CHID[3:0] + SGN extension (4 bits) + 24-bit ADC data.
70 * ADC Output Data Format 32-bit (25-bit right justified data):
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Dqcom-pm8xxx-xoadc.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * specific-purpose and general purpose ADC converters and channels.
13 #include <linux/iio/adc/qcom-vadc-common.h>
27 * Qualcomm tree. Their kernel has two out-of-tree drivers for the ADC:
28 * drivers/misc/pmic8058-xoadc.c
29 * drivers/hwmon/pm8xxx-adc.c
57 /* Proper ADC registers */
99 * On a later ADC the decimation factors are defined as
155 * struct xoadc_channel - encodes channel properties and defaults
162 * @prescale: the channels have hard-coded prescale ratios defined
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Dmxs-lradc-adc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale MXS LRADC ADC driver
18 #include <linux/mfd/mxs-lradc.h>
43 "mxs-lradc-channel0",
44 "mxs-lradc-channel1",
45 "mxs-lradc-channel2",
46 "mxs-lradc-channel3",
47 "mxs-lradc-channel4",
48 "mxs-lradc-channel5",
52 "mxs-lradc-thresh0",
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Dti-adc084s021.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Driver for Texas Instruments' ADC084S021 ADC chip.
39 __be16 rx_buf[5]; /* First 16-bits are trash */
68 * adc084s021_adc_conversion() - Read an ADC channel and return its value.
70 * @adc: The ADC SPI data.
73 static int adc084s021_adc_conversion(struct adc084s021 *adc, __be16 *data) in adc084s021_adc_conversion() argument
75 int n_words = (adc->spi_trans.len >> 1) - 1; /* Discard first word */ in adc084s021_adc_conversion()
79 ret = spi_sync(adc->spi, &adc->message); in adc084s021_adc_conversion()
84 *(data + i) = adc->rx_buf[i + 1]; in adc084s021_adc_conversion()
93 struct adc084s021 *adc = iio_priv(indio_dev); in adc084s021_read_raw() local
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Dti-adc12138.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ADC12130/ADC12132/ADC12138 12-bit plus sign ADC driver
52 * Maximum size needed: 16x 2 bytes ADC data + 8 bytes timestamp.
128 static int adc12138_mode_programming(struct adc12138 *adc, u8 mode, in adc12138_mode_programming() argument
132 .tx_buf = adc->tx_buf, in adc12138_mode_programming()
133 .rx_buf = adc->rx_buf, in adc12138_mode_programming()
139 if (adc->id != adc12138) in adc12138_mode_programming()
142 adc->tx_buf[0] = mode; in adc12138_mode_programming()
144 ret = spi_sync_transfer(adc->spi, &xfer, 1); in adc12138_mode_programming()
148 memcpy(rx_buf, adc->rx_buf, len); in adc12138_mode_programming()
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Dstm32-adc-core.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file is part of STM32 ADC driver
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
8 * Inspired from: fsl-imx25-tsadc
30 #include "stm32-adc-core.h"
46 * struct stm32_adc_common_regs - stm32 common registers
51 * @ier: interrupt enable register offset for each adc
66 * struct stm32_adc_priv_cfg - stm32 core compatible configuration data
70 * @ipid: adc identification number
73 * @num_adcs: maximum number of ADC instances in the common registers
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Dmen_z188_adc.c1 // SPDX-License-Identifier: GPL-2.0-only
53 struct z188_adc *adc = iio_priv(iio_dev); in z188_iio_read_raw() local
59 tmp = readw(adc->base + chan->channel * 4); in z188_iio_read_raw()
62 dev_info(&iio_dev->dev, in z188_iio_read_raw()
63 "Oversampling error on ADC channel %d\n", in z188_iio_read_raw()
64 chan->channel); in z188_iio_read_raw()
65 return -EIO; in z188_iio_read_raw()
71 ret = -EINVAL; in z188_iio_read_raw()
100 static int men_z188_probe(struct mcb_device *dev, in men_z188_probe() argument
103 struct z188_adc *adc; in men_z188_probe() local
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Dti-ads8344.c1 // SPDX-License-Identifier: GPL-2.0+
3 * ADS8344 16-bit 8-Channel ADC driver
26 * Lock protecting access to adc->tx_buff and rx_buff,
76 static int ads8344_adc_conversion(struct ads8344 *adc, int channel, in ads8344_adc_conversion() argument
79 struct spi_device *spi = adc->spi; in ads8344_adc_conversion()
82 adc->tx_buf = ADS8344_START; in ads8344_adc_conversion()
84 adc->tx_buf |= ADS8344_SINGLE_END; in ads8344_adc_conversion()
85 adc->tx_buf |= ADS8344_CHANNEL(channel); in ads8344_adc_conversion()
86 adc->tx_buf |= ADS8344_CLOCK_INTERNAL; in ads8344_adc_conversion()
88 ret = spi_write(spi, &adc->tx_buf, 1); in ads8344_adc_conversion()
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/linux-6.12.1/drivers/hwmon/
Dadcxx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * ADC<bb><c>S<sss>, where
18 * http://www.national.com/ds/DC/ADC<bb><c>S<sss>.pdf
32 #include <linux/hwmon-sysfs.h>
47 static ssize_t adcxx_show(struct device *dev, in adcxx_show() argument
50 struct spi_device *spi = to_spi_device(dev); in adcxx_show()
52 struct adcxx *adc = spi_get_drvdata(spi); in adcxx_show() local
58 if (mutex_lock_interruptible(&adc->lock)) in adcxx_show()
59 return -ERESTARTSYS; in adcxx_show()
61 if (adc->channels == 1) { in adcxx_show()
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/linux-6.12.1/drivers/mfd/
Dpcf50633-adc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* NXP PCF50633 ADC Driver
4 * (C) 2006-2008 by Openmoko, Inc.
11 * NOTE: This driver does not yet support subtractive ADC mode, which means
23 #include <linux/mfd/pcf50633/adc.h>
51 return platform_get_drvdata(pcf->adc_pdev); in __to_adc()
62 /* start ADC conversion on selected channel */ in adc_setup()
69 struct pcf50633_adc *adc = __to_adc(pcf); in trigger_next_adc_job_if_any() local
72 head = adc->queue_head; in trigger_next_adc_job_if_any()
74 if (!adc->queue[head]) in trigger_next_adc_job_if_any()
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/linux-6.12.1/sound/soc/codecs/
Drt5514.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5514.c -- RT5514 ALSA SoC audio codec driver
24 #include <sound/soc-dapm.h>
31 #include "rt5514-spi.h"
120 regmap_write(rt5514->i2c_regmap, 0x18002000, 0x000010ec); in rt5514_enable_dsp_prepare()
122 regmap_write(rt5514->i2c_regmap, 0x18002200, 0x00028604); in rt5514_enable_dsp_prepare()
124 regmap_write(rt5514->i2c_regmap, 0xfafafafa, 0x00000001); in rt5514_enable_dsp_prepare()
125 /* mini-core reset */ in rt5514_enable_dsp_prepare()
126 regmap_write(rt5514->i2c_regmap, 0x18002f00, 0x0005514b); in rt5514_enable_dsp_prepare()
127 regmap_write(rt5514->i2c_regmap, 0x18002f00, 0x00055149); in rt5514_enable_dsp_prepare()
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Dak5558.c1 // SPDX-License-Identifier: GPL-2.0
3 // Audio driver for AK5558 ADC
22 #include <sound/soc-dapm.h>
78 "Sharp Roll-Off", "Slow Roll-Off",
79 "Short Delay Sharp Roll-Off", "Short Delay Slow Roll-Off",
108 SND_SOC_DAPM_ADC("ADC Ch1", NULL, AK5558_00_POWER_MANAGEMENT1, 0, 0),
109 SND_SOC_DAPM_ADC("ADC Ch2", NULL, AK5558_00_POWER_MANAGEMENT1, 1, 0),
110 SND_SOC_DAPM_ADC("ADC Ch3", NULL, AK5558_00_POWER_MANAGEMENT1, 2, 0),
111 SND_SOC_DAPM_ADC("ADC Ch4", NULL, AK5558_00_POWER_MANAGEMENT1, 3, 0),
112 SND_SOC_DAPM_ADC("ADC Ch5", NULL, AK5558_00_POWER_MANAGEMENT1, 4, 0),
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